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PCM1792A: SPI bit order

Mark Willerton
Prodigy 140 points
Part Number: PCM1792A

Having some trouble getting a PCM1792A to respond to the commands sent through the SPI interface. Just a basic question, is it the MSB that is sent first in the 16bit mesage? In other words, the R/W bit.

  • 0
    TI__Guru 52663 points

    Hi Mark,

    The MSB bit is sent first, which is the R/W bit.

    Thanks,

    Paul

  • 0 in reply to Paul_Frost
    Prodigy 140 points

    Thanks Paul, that's what I thought. So that is not the problem.

    There is one more point in the datasheet that might explain my problem. At the moment, I move the ATLD bit from 0 to 1 to 0 AFTER writing the attenuation registers 16 and 17. My thinking is that ATLD loads the L and R content simultaneously. I suspect that it might be necessary to set ATLD to 1 first, before writing registers 16 and 17. I'll give that a try. Otherwise, I will have to look more closely at the individual SPI lines (I did this on a separate board with the MCU alone and it was ok but maybe something has gon wrong!). I'll let you know how things go.

    Regards
    Mark

  • 0 in reply to Mark Willerton
    Prodigy 140 points

    So that didn't help either! The setup I am using is as follows:

    1. The circuit is very much in line with Fig.35 (TYPICAL CONNECTION DIAGRAM IN PCM MODE) in the datasheet. If I pass a 1 kHz sinewave to pins 4-7 the signal is correctly reconstructed by the analogue section. The amplitude seems not to be attenuated.

    2. The reset signal is release soon after startup.

    3. I use a PIC controller to manage the SPI through pins 10-13. I have disabled the code that reads back the data on MDO to concentrate on getting the control signals using /MS, MDI and MC. The SPI is managed by setting the pins to create the correct data patterns (the PIC I use doesn't have a dedicated SPI interface). Using a digital scope, it can be seen that the SPI signals are correct and comply more than enough with the timing requirements in Fig.31 (Control Interface Timing).

    4. The commands used are as follows (where pq stands for the volume level i.e. 00 - FF):

    a) Alternative 1: 0x10pq    0x11pq    0x12D0    0x1250          (write left register 16, write right register 17, enable ATDL, disable ADTL)

    b) Alternative 2: 0x1250    0x10pq    0x11pq    0x1250          (enable ATDL, write left register 16, write right register 17, disable ADTL)

    Neither alternative seems to work. The sine wave is still there on both channels but the amplitude remains unchanged!

    Any thoughts?

  • 0 in reply to Mark Willerton
    Prodigy 140 points

    Well, I found the problem. Was a bit easy in the end! It was the pin that selects between SPI and I2C that I had set to 3V3 instead of 0V. Setting this pin correctly did the trick!

    If I understand the spec correctly, ATLD can be used with either alternative 1 or 2 above. I guess the benefit with alt.1 is that I can check that the register content has arrived correctly before giving the command to 'use' the attenuation data. Is that right?

    Thanks again for the help!