TAS6424M-Q1: PBTL in I2S only MONO output.. How to get Stereo?

Oriol,

Thank you for using our TAS6524M-Q1 amplifier.  Let me see if I can clarify some things.

Per the datasheet, the device must be in Standby mode (/STANDBY pin low) to program it for PBTL.  Only SDIN1 is needed as the Left channel is mapped to the PBTL channel made up of channel 1 and 2, and the right chanell is mapped to channel 3 and 4. 

Hello Gregg,

Thanks for your response.

Actually datasheet is not so clear. I am currently entering the device in stby mode before sending commands, this is not a problem. 

Initial design has the SDIN1 and SDIN2 together, so only getting Left Channel on 1/2 and 3/4. If only using SDIN1, and not connecting SDIN2, I got the same, Left channel on 1/2 and 3/4. If I tie SDIN2 to ground, then no sound.

I have seen on this forum people saying is not possible to get Stereo mode in PBTL, so please, clarify me this and I really hope it's possible, because if not, lot of time and money wasted..

Thanks!

Oriol.

Oriol,

Thanks for getting back so quickly and providing  a detailed response.  I performed a search and spoke with the engineer that replied to the posts. 

I was incorrect in my earlier response.  You are correct in what your measuring.

Do you have a DSP in your design?  If so, we recommend using TDM mode or reformatting your I2S.

Hello Gregg,

So then there is no Stereo mode in PBTL? Unfortunately I do not have any DSP to run in TDM mode, I can only use I2S. There is no way to get it working then? Because then.. I am really shocked! Or any other pin compatible solution?

This is my init code, does it looks correct?

void tas6424_init(void) 
{

	ioport_set_pin_level(GPIO27, IOPORT_PIN_LEVEL_LOW);  //CHIP enter standby mode by MCU
	delay_ms(10);
	
	write_byte_data(TAS6424_ADDR, 0x00, 0x80); // Chip reset

	write_byte_data(TAS6424_ADDR, 0x00, 0x30); // PBTL MODE

	write_byte_data(TAS6424_ADDR, 0x04, 0x55); // Mute Output

	write_byte_data(TAS6424_ADDR, 0x21, 0x80); // Clear all faults
	
	write_byte_data(TAS6424_ADDR, 0xff, 0x64); // Clear all faults
	
	write_byte_data(TAS6424_ADDR, 0x01, 0x31); // Set Gain to Level 2 (15V)
	
	write_byte_data(TAS6424_ADDR, 0x02, 0x62); // Set PWM for 44x FS 
	
	write_byte_data(TAS6424_ADDR, 0x03, 0x04); // 44100 I2S
	
        delay_cycles(100000);

	write_byte_data(TAS6424_ADDR, 0x05, 0x00); // CH1 Volume 0xCF 0dB 0.5dB/Step
	write_byte_data(TAS6424_ADDR, 0x06, 0x00); // CH2 Volume 0xCF 0dB 0.5dB/Step
	write_byte_data(TAS6424_ADDR, 0x07, 0x00); // CH3 Volume 0xCF 0dB 0.5dB/Step
	write_byte_data(TAS6424_ADDR, 0x08, 0x00); // CH4 Volume 0xCF 0dB 0.5dB/Step
	
        write_byte_data(TAS6424_ADDR, 0x04, 0x00); // Un-mute outputs 

	write_byte_data(TAS6424_ADDR, 0x05, 0xB0); // CH1 Volume 0xCF 0dB 0.5dB/Step
	write_byte_data(TAS6424_ADDR, 0x06, 0xB0); // CH2 Volume 0xCF 0dB 0.5dB/Step
	write_byte_data(TAS6424_ADDR, 0x07, 0xB0); // CH3 Volume 0xCF 0dB 0.5dB/Step
	write_byte_data(TAS6424_ADDR, 0x08, 0xB0); // CH4 Volume 0xCF 0dB 0.5dB/Step


	ioport_set_pin_level(GPIO27, IOPORT_PIN_LEVEL_HIGH);  //CHIP exists standby mode by MCU
	delay_ms(10);

	
	
}

Hi Oriol,

See my notes in your code