Hello experts,
I got question about suported clock rate from customer.
In datasheet P19 9.3.1.5, there is description "The MCLK clock must not be in phase to sync to SCLK."
Could you tell me how do we interpret this description? We don't see such description on other device's datasheet.
Is there OK/NG timing chart something?
Thanks and best regards,
Ryo Akashi