TLV320AIC3104-Q1: PCM out delayed 15 seconds

user5815056

Hi:

we used TLV320AIC3104-Q1 codec, when calling, the codec PCM out(DOUT pin5) is delayed about 15 seconds，but mic's ADC has been inputed to MIC1R.
at the same time, RIGHT_LOP(pin 29) & RIGHT_LOM(pin 30) output is OK(no delay).
we use single mic, MIC1RP/LINE1RP(pin 12) & MIC1RM/LINE1RM(pin 13), MIC2L/LINE2L/MICDET is not used.

How can I try to find out the solution to the problem?

over 3 years ago

0 Aaron Estrada over 3 years ago

TI__Mastermind 22950 points

Hello,

Let me see if I am understanding your question correctly....

MIC is input on MIC2L/R and ADC output is monitored on DOUT but there is a 15s delay from MIC output and DOUT. A signal is also monitored on RIGHT_LOP/M with no delay. My question is what is RIGHT_LOP outputting? is this input from DIN or is the MIC input sent to RIGHT_LOP/M using a bypass path?

Also, it would be very helpful if you can provide a register dump along with scope shots of MCLK, BCLK, WCLK, and DIN/DOUT.

Regards,

Aaron

0 user5815056 over 3 years ago in reply to Aaron Estrada

Prodigy 100 points

Hi Aaron:

Thank you for your reply.

Sorry i didn't make it clear.Is the following diagram OK?

0 Aaron Estrada over 3 years ago in reply to user5815056

TI__Mastermind 22950 points

Hello,

Can you please share a register dump?

Regards,

Aaron

0 user5815056 over 3 years ago in reply to Aaron Estrada

Prodigy 100 points

Hi Aaron:

Please let me know how can i get a register dump and which register should i get?

Thank you !

0 Aaron Estrada over 3 years ago in reply to user5815056

TI__Mastermind 22950 points

Hello,

If you can read all of the registers and provide the values to me. I would like to see how the registers are being configured.

Regards,

Aaron

0 user5815056 over 3 years ago in reply to Aaron Estrada

Prodigy 100 points

Hi Aaron:

When the problem occurs, the register values are as follows:

0 Aaron Estrada over 3 years ago in reply to user5815056

TI__Mastermind 22950 points

Hello,

I ran your configuration on an EVM and did not see any delay on DOUT.

Can you share scope shots of the Audio Serial Interface? (BCLK, WCLK and DOUT) Also looking at your PLL configuration, I am seeing that the input CLK frequency is 2.048MHz. Can you confirm this?

Regards,

Aaron

0 user5815056 over 3 years ago in reply to Aaron Estrada

Prodigy 100 points

Hi Aaron:

Scope shots are as follows:

0 user5815056 over 3 years ago in reply to Aaron Estrada

Prodigy 100 points

Hi Aaron:

Is there still any good suggestions?

0 Aaron Estrada over 3 years ago in reply to user5815056

TI__Mastermind 22950 points

Hello,

Apologies for the delayed response. I have taken a look at the information you provided and from a hardware and device configuration standpoint, I do not see anything that may cause any sort of delay. The ASI scope shots look good and follow data sheet specifications.

BCLK matches the register settings as well as WCLK matches Fs. Can we be sure that this delay is not caused by any software? is it possible to capture the MIC input signal and DOUT?

Regards,
Aaron

0 user5815056 over 3 years ago in reply to Aaron Estrada

Prodigy 100 points

Hi Aaron:

Thank you for your prompt response.

I'm not sure that the software is 100% OK, LTE module drives the codec.

We have re-measured the MIC&DIN&DOUT signal, and we found that at the beginning the codec's DOUT signal is just OK, then the signal was gone, 15s later the signal came back.

What are the possible causes of this situation?

0 Aaron Estrada over 3 years ago in reply to user5815056

TI__Mastermind 22950 points

Hello,

Thank you for providing the scope shots. It does look as if somehow the device is getting muted or the ADC is powering down. A delay this long is not configurable within the device. Even with no input, the device will still be digitizing noise and there should always be data on DOUT unless the ADC/PGA is muted or powered down.

What happens if you just play a 1kHz sine wave?

Regards,

Aaron

0 user5815056 over 3 years ago in reply to Aaron Estrada

Prodigy 100 points

Hi Aaron:

Thank you for your reply,

We may have found the cause of the problem.

We set the coupling capacitance 22uF of mic1rp input (see Fig. 1), and there is no problem for AC signal to pass through. So the input signal we tested is OK.

However, this leads to a slow rise of DC voltage at the codec side, which is about tens of seconds delay. When the DC voltage reaches 1.4V, codec works OK (see Figure 2). When we change the coupling capacitance to 0.1 UF, codec works normally.

What is this 1.4V for? I didn't find it in the datasheet.

Regards,

Yang