Part Number: TLV320AIC3104-Q1
we used TLV320AIC3104-Q1 codec, when calling, the codec PCM out(DOUT pin5) is delayed about 15 seconds，but mic's ADC has been inputed to MIC1R.at the same time, RIGHT_LOP(pin 29) & RIGHT_LOM(pin 30) output is OK(no delay).we use single mic, MIC1RP/LINE1RP(pin 12) & MIC1RM/LINE1RM(pin 13), MIC2L/LINE2L/MICDET is not used.
How can I try to find out the solution to the problem?
Let me see if I am understanding your question correctly....
MIC is input on MIC2L/R and ADC output is monitored on DOUT but there is a 15s delay from MIC output and DOUT. A signal is also monitored on RIGHT_LOP/M with no delay. My question is what is RIGHT_LOP outputting? is this input from DIN or is the MIC input sent to RIGHT_LOP/M using a bypass path?
Also, it would be very helpful if you can provide a register dump along with scope shots of MCLK, BCLK, WCLK, and DIN/DOUT.
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In reply to Aaron Estrada51:
Thank you for your reply.
Sorry i didn't make it clear.Is the following diagram OK?
In reply to user5815056:
Can you please share a register dump?
Please let me know how can i get a register dump and which register should i get?
Thank you !
If you can read all of the registers and provide the values to me. I would like to see how the registers are being configured.
When the problem occurs, the register values are as follows:
I ran your configuration on an EVM and did not see any delay on DOUT.
Can you share scope shots of the Audio Serial Interface? (BCLK, WCLK and DOUT) Also looking at your PLL configuration, I am seeing that the input CLK frequency is 2.048MHz. Can you confirm this?
Scope shots are as follows:
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