Part Number: PCM1793
Hi, I need a DAC with AES/EBU input, so I used DIR9001 and PCM1793. The problem is that left signal from PCM1793 is not correct (is not a sine) . Could you please check the schematic below? Thanks in advance.
If the LEFT output is not a sine wave, what is it? Could you share an scope output of the channel compared to RIGHT output?
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Does the digital source have a sine wave driven on the left channel?
In reply to Paul_Frost:
thank you for responding back. Anyway, I made some corrections on the schematic:
The problem now is that left and right signals are different.
This is the left:
This is the right:
In reply to Andy Peters:
as I've responded to Paul, I've modified the circuit and the problem is that left and right channels are different. The generator works correctly, indeed I used it with an other DAC.
In reply to Claudio Fiorentini:
This looks similar to a formating issue of the I2S. Is it possible your edge timing is marginal so that the DAC is latching the data offset by 1 bit? A good check would be to just invert the LRCK and see if the issue switches to the right channel. I recommend you capture a few I2S frames to see if the data is in the correct bit position.
I've inverted the LRCK and the issue switches to the right channel, so it concerns the same two pins. Anyway, I've captured a I2S frame and the data is in the correct position(as you can see in the image),so I don't know how I can solve this problem.
My concern is that your LRCK seems to be at 1.8V logic but the BCK is 3.3V Could this be an MCU issue? The minimum VIH (voltage-input: high) level for this device is 2V. Seems like you are on the border of that so you could be seeing inconsistent results. Try correcting that first.
in that image there wasn't the LRCK, but the DATA, anyway I've controlled all the DAC input signals and they respect the datasheet voltage values(as you can see in the images), so maybe the problem is the DAC and I should substitute it.
DATA and BCK:
Can you measure the PCM output on the pins themselves? I think you should compare VOUTL+, VOUTL-, VOUTR+, VOUTR- to check if the error is actually being created in the output amplifier stage.
Hi Paul, I've just send you the images from the PCM output, I've disconnected the output stage because the issue starts from PCM.
these are VOUTL+ and VOUTL-:
These are VOUTR+ and VOUTR-:
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