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TLV320AIC3107: MIC is recording with a noise and speaker is giving low volume for 16KHz file

Part Number: TLV320AIC3107

Hi TI team,

We are using TLV320AIC3107 codec in our project. We are observing the following issues while trying to play some audio file and play the recorded audio file from the codec.

1. Even though we set MIC BIAS voltage as 2V in dts file while recording the audio, the MICBIAS Control Register (0x19) is automatically changing to 0x02. I had seen the driver code but I'm not able to find the place where this register is getting changed. Due to this change the MIC is not working and no audio is being recorded. As a temporary solution we're setting that register forcefully to 0x40 using i2c commands from terminal before starting the recording but every time I need to set that register since after the recording has finished the register value is again shifting to 0x02. Even though I'm setting that register to 0x40 when I'm reading that register it is showing 0x42. We need to know the reason why it's automatically changing to 0x02 after recording has finished and why that 0x02 bit is not clearing.

2. After we have changed the MICBIAS register also we were able to record the audio but while try to hear the recorded audio we noticed the volume of the audio is very feeble. We had seen that by default AGC is disabled in the analog path and after enabling the AGC we were able to hear the recorded audio with a better volume but we were hearing some additional noise. Please let us know if there is any register configuration change needed to eliminate the additional noise.

3. This is regarding the speaker path. When we are trying to play 8KHz audio file the volume is quite clear but when we try to play 16KHz the volume of the output dropped. We tried changing the Left and Right DAC Volume control register but the issue persists. Please let us know how to improve the output volume for the 16KHz file.

We've connected the MIC lines to MIC3R and MIC3L pins and the speakers have been connected to HPLOUT and HPROUT pins.

Thanks in advance.

Regards,

Ranjith Kumar

  • Hello Ranjith,

    Can you share a schematic and register dump? It may be that the device is not properly configured for questions 2 and 3. If you can also share MCLK, WCLK and BCLK frequencies along with some scope shots of the audio serial interface, that would be great. 

    As for question 1, this is not typical behavior from the device. The MICBIAS register should not automatically configure itself.

    Regards,

    Aaron

  • Hi Aaron,

    I've attached the audio section of the schematic and register dumps while recording and playing the audio files with 8KHz and 16KHz sampling frequency.

    I've also attached the sample recorded files which we had recorded with AGC enabled for 8KHz and 16KHz. With 16KHz the audio recorded is quite clear compared to 8KHz with same volume in the speaker but some additional noise is present which you can notice.

    Regarding the frequencies BCLK is 256KHz for 8KHz sampling frequency and 512KHz for 16KHz sampling frequency, WCLK is 16KHz, MCLK is 0Hz and the CLKDIV_IN and PLLCLK_IN uses BCLK as its source.

    NOTE: In the register dumps you can see in register 0x19 the BIT 2 is not clearing and in idle stage also the BIT 2 is set. We had forcefully set that register before initiating the recording and after the recording has finished the register value is again shifting to 0x02. We are using tlv320aic3x.c driver file for our purpose and kernel version is 5.4.10. I've put debug prints everywhere in the driver file where the register is being written and in no places the register value is 0x02, so we can't find where that register is being over written.

    Regards,

    Ranjith Kumar

    MIC_dump.txt
    Idle condition:
    ---------------
         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
    00: 00 00 00 10 04 00 00 00 00 00 00 01 00 00 00 80    ...??......?...?
    10: 80 ff ff 78 78 78 78 78 78 02 00 fe 00 00 fe 00    ?..xxxxxx?.?..?.
    20: 70 71 00 00 00 00 00 00 00 00 00 80 80 00 00 00    pq.........??...
    30: 00 00 00 04 00 00 00 00 00 00 04 00 00 00 00 00    ...?......?.....
    40: 00 04 00 00 00 00 00 00 04 00 00 00 00 00 00 00    .?......?.......
    50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    60: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00    ......?.........
    70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    80: 00 00 00 10 04 00 00 00 00 00 00 01 00 00 00 80    ...??......?...?
    90: 80 ff ff 78 78 78 78 78 78 02 00 fe 00 00 fe 00    ?..xxxxxx?.?..?.
    a0: 70 71 00 00 00 00 00 00 00 00 00 80 80 00 00 00    pq.........??...
    b0: 00 00 00 04 00 00 00 00 00 00 04 00 00 00 00 00    ...?......?.....
    c0: 00 04 00 00 00 00 00 00 04 00 00 00 00 00 00 00    .?......?.......
    d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    e0: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00    ......?.........
    f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    
    
    Recording 8KHz file with AGC enabled Left/Right AGC CTRL Reg value 0x80
    -----------------------------------------------------------------------
         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
    00: 00 00 aa 91 c0 00 00 0a 00 00 00 01 a0 00 00 20    ..???..?...??.. 
    10: 20 ff ff 04 78 78 04 78 78 42 80 fe 00 80 fe 00     ..?xx?xxB??.??.
    20: 77 77 00 00 55 00 00 00 40 00 00 a8 a8 2f 2f af    ww..U...@..??//?
    30: 00 00 00 0c 2f 2f af 00 00 00 0c 00 00 00 2f 2f    ...?//?...?...//
    40: af 0c 00 00 00 2f 2f af 0c 21 2f af 2f 2f af 08    ??...//??!/?//??
    50: 2f 2f af 00 00 00 08 00 00 00 2f 2f af 08 00 00    //?...?...//??..
    60: 00 00 00 00 00 00 a2 00 00 00 00 c0 00 00 00 00    ......?....?....
    70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    80: 00 00 aa 91 c0 00 00 0a 00 00 00 01 a0 00 00 20    ..???..?...??.. 
    90: 20 ff ff 04 78 78 04 78 78 42 80 fe 00 80 fe 00     ..?xx?xxB??.??.
    a0: 77 77 00 00 55 00 00 00 40 00 00 a8 a8 2f 2f af    ww..U...@..??//?
    b0: 00 00 00 0c 2f 2f af 00 00 00 0c 00 00 00 2f 2f    ...?//?...?...//
    c0: af 0c 00 00 00 2f 2f af 0c 21 2f af 2f 2f af 08    ??...//??!/?//??
    d0: 2f 2f af 00 00 00 08 00 00 00 2f 2f af 08 00 00    //?...?...//??..
    e0: 00 00 00 00 00 00 a2 00 00 00 00 c0 00 00 00 00    ......?....?....
    f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    
    
    Recording 16KHz file with AGC enabled Left/Right AGC CTRL Reg value 0x80
    -----------------------------------------------------------------------
         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
    00: 00 00 44 91 60 00 00 0a 00 00 00 01 a0 00 00 20    ..D?`..?...??.. 
    10: 20 ff ff 04 78 78 04 78 78 42 80 fe 00 80 fe 00     ..?xx?xxB??.??.
    20: 77 77 00 00 55 00 00 00 40 00 00 a8 a8 2f 2f af    ww..U...@..??//?
    30: 00 00 00 0c 2f 2f af 00 00 00 0c 00 00 00 2f 2f    ...?//?...?...//
    40: af 0c 00 00 00 2f 2f af 0c 21 2f af 2f 2f af 08    ??...//??!/?//??
    50: 2f 2f af 00 00 00 08 00 00 00 2f 2f af 08 00 00    //?...?...//??..
    60: 00 00 00 00 00 00 a2 00 00 00 00 c0 00 00 00 00    ......?....?....
    70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    80: 00 00 44 91 60 00 00 0a 00 00 00 01 a0 00 00 20    ..D?`..?...??.. 
    90: 20 ff ff 04 78 78 04 78 78 42 80 fe 00 80 fe 00     ..?xx?xxB??.??.
    a0: 77 77 00 00 55 00 00 00 40 00 00 a8 a8 2f 2f af    ww..U...@..??//?
    b0: 00 00 00 0c 2f 2f af 00 00 00 0c 00 00 00 2f 2f    ...?//?...?...//
    c0: af 0c 00 00 00 2f 2f af 0c 21 2f af 2f 2f af 08    ??...//??!/?//??
    d0: 2f 2f af 00 00 00 08 00 00 00 2f 2f af 08 00 00    //?...?...//??..
    e0: 00 00 00 00 00 00 a2 00 00 00 00 c0 00 00 00 00    ......?....?....
    f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    
    SPKR_dump.txt
    Idle condition:
    ---------------
         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
    00: 00 00 00 10 04 00 00 00 00 00 00 01 00 00 00 80    ...??......?...?
    10: 80 ff ff 78 78 78 78 78 78 02 00 fe 00 00 fe 00    ?..xxxxxx?.?..?.
    20: 00 00 00 00 00 00 00 00 00 00 00 80 80 00 00 00    ...........??...
    30: 00 00 00 04 00 00 00 00 00 00 04 00 00 00 00 00    ...?......?.....
    40: 00 04 00 00 00 00 00 00 04 00 00 00 00 00 00 00    .?......?.......
    50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    60: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00    ......?.........
    70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    80: 00 00 00 10 04 00 00 00 00 00 00 01 00 00 00 80    ...??......?...?
    90: 80 ff ff 78 78 78 78 78 78 02 00 fe 00 00 fe 00    ?..xxxxxx?.?..?.
    a0: 00 00 00 00 00 00 00 00 00 00 00 80 80 00 00 00    ...........??...
    b0: 00 00 00 04 00 00 00 00 00 00 04 00 00 00 00 00    ...?......?.....
    c0: 00 04 00 00 00 00 00 00 04 00 00 00 00 00 00 00    .?......?.......
    d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    e0: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00    ......?.........
    f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    
    Playing 8KHz file
    -----------------
         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
    00: 00 00 aa 91 c0 00 00 0a 00 00 00 01 50 00 00 20    ..???..?...?P.. 
    10: 20 ff ff 00 78 78 00 78 78 02 00 fe 00 00 fe 00     ...xx.xx?.?..?.
    20: 00 00 00 00 00 c0 00 00 40 00 00 28 28 2f 2f af    .....?..@..((//?
    30: 00 00 00 0f 2f 2f af 00 00 00 0f 00 00 00 2f 2f    ...?//?...?...//
    40: af 0f 00 00 00 2f 2f af 0f 21 2f af 2f 2f af 0b    ??...//??!/?//??
    50: 2f 2f af 00 00 00 0b 00 00 00 2f 2f af 0b fe 0c    //?...?...//????
    60: 00 00 00 00 00 00 a2 00 00 00 00 c0 00 00 00 00    ......?....?....
    70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    80: 00 00 aa 91 c0 00 00 0a 00 00 00 01 50 00 00 20    ..???..?...?P.. 
    90: 20 ff ff 00 78 78 00 78 78 02 00 fe 00 00 fe 00     ...xx.xx?.?..?.
    a0: 00 00 00 00 00 c0 00 00 40 00 00 28 28 2f 2f af    .....?..@..((//?
    b0: 00 00 00 0f 2f 2f af 00 00 00 0f 00 00 00 2f 2f    ...?//?...?...//
    c0: af 0f 00 00 00 2f 2f af 0f 21 2f af 2f 2f af 0b    ??...//??!/?//??
    d0: 2f 2f af 00 00 00 0b 00 00 00 2f 2f af 0b fe 0c    //?...?...//????
    e0: 00 00 00 00 00 00 a2 00 00 00 00 c0 00 00 00 00    ......?....?....
    f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    
    Playing 16KHz file
    ------------------
         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
    00: 00 00 44 91 60 00 00 0a 00 00 00 01 50 00 00 20    ..D?`..?...?P.. 
    10: 20 ff ff 00 78 78 00 78 78 02 00 fe 00 00 fe 00     ...xx.xx?.?..?.
    20: 00 00 00 00 00 c0 00 00 40 00 00 28 28 2f 2f af    .....?..@..((//?
    30: 00 00 00 0f 2f 2f af 00 00 00 0f 00 00 00 2f 2f    ...?//?...?...//
    40: af 0f 00 00 00 2f 2f af 0f 21 2f af 2f 2f af 0b    ??...//??!/?//??
    50: 2f 2f af 00 00 00 0b 00 00 00 2f 2f af 0b fe 0c    //?...?...//????
    60: 00 00 00 00 00 00 a2 00 00 00 00 c0 00 00 00 00    ......?....?....
    70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    80: 00 00 44 91 60 00 00 0a 00 00 00 01 50 00 00 20    ..D?`..?...?P.. 
    90: 20 ff ff 00 78 78 00 78 78 02 00 fe 00 00 fe 00     ...xx.xx?.?..?.
    a0: 00 00 00 00 00 c0 00 00 40 00 00 28 28 2f 2f af    .....?..@..((//?
    b0: 00 00 00 0f 2f 2f af 00 00 00 0f 00 00 00 2f 2f    ...?//?...?...//
    c0: af 0f 00 00 00 2f 2f af 0f 21 2f af 2f 2f af 0b    ??...//??!/?//??
    d0: 2f 2f af 00 00 00 0b 00 00 00 2f 2f af 0b fe 0c    //?...?...//????
    e0: 00 00 00 00 00 00 a2 00 00 00 00 c0 00 00 00 00    ......?....?....
    f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    

  • Hello Ranjith,

    I took a look at the 16kHz register dump and it seems as though the PLL is configured incorrectly. I recommend the following settings for the PLL:

    P = 1

    R = 4

    J = 48

    This should provide an Fsref = 48kHz. 

    Another violation I see is for the 8kHz file. The minimum PLL input clock frequency is 512kHz so 256kHz is violating this constraint. WCLK should also equal the sampling frequency and in the case of the 8kHz file, WCLK is 16kHz. This may be why audio is a bit more clear for the 16kHz file. Please try the recommended settings for the 16kHz and let me know if there is any progress.

    Regards,

    Aaron

  • Hi Aaron,

    Whatever the register dumps I had shared with you, the register settings are done automatically by the driver and we hadn't touched the codec driver which was present in our SDK. We are using Linux Kernel version 5.4.10.

    Regarding the BCLK and WCLK we've measured again those frequencies and got the below results.

    For Stereo and Mono 8KHz file, BCLK=256KHz and WCLK=8KHz
    For Stereo and Mono 16KHz file, BCLK=512KHz and WCLK=16KHz.

    The BCLK and WCLK generation are taken care by the SoC itself based on the input audio file sampling rate and we've no control in changing those frequencies.

    Regards,

    Ranjith Kumar.

  • Hello Ranjith,

    If MCLK is not being supplied, the sampling rate needs to be determined by BCLK. If BCLK, is 256kHz, it violates the PLL constraint for when D = 0000. Minimum BCLK frequency should be 512kHz. 

    If D does not = 0000, the PLLCLK_IN/P needs to be between 10MHz and 20MHz. 

    Regards,

    Aaron

  • Hi Aaron,

    We have change some setting like increasing Left/Right DAC Digital Volume, routed DAC_L1 and DAC_R1 to HPLOUT and HPROUT respectively in addition to increasing the respective analog gain values and configuring Line1L and Line1R in fully differential mode using alsamixer and we got the expected results in speaker and mic side. Now we need to make these configurations in driver so that these configurations get applied on every boot time.


    We are having one doubt, while we are changing the settings using the alsamixer / amixer commands and rebooted the board the register values are not changing in those settings and it is with the value which we kept before the reboot. Is this the expected behavior or the register values will reset to the default values?

    Regards,

    Ranjith Kumar

  • Hello Ranjith,

    The device will boot up in default values. Issuing a Software/Hardware reset or power cycle will restore codec default values to default. 

    Regards,

    Aaron

  • Hi Aaron,

    Yes the device must boot up in default values but in our case that is not happening.

    Following is what I had observed.

    While I had dumped the registers the value of 43 and 44 registers it is showing as 0x80. While I'm playing the audio and checking the registers the value got changed and that value remains even if we reboot the board. So my doubt is like whether we reboot also the values in alsamixer will be retained or not?

    Thanks,

    Ranjith

  • Hello Ranjith,

    Let me discuss this internally as I have not seen this experienced before. The driver must be re-writing the registers as like i mentioned before, after a restart, the device should be configured with default values. 

    Regards,

    Aaron

  • Hi Aaron,

    Thanks for your response. Please try to close this as soon as possible since we've created this thread more than a month back and from our side we need to close this issue as soon as possible. And please suggest us how to set some default values in the driver level since wherever we are trying to set some default values it is not reflecting once we power on the device.

    Regards,

    Ranjith

  • Hello Ranjith,

    In order to configure some default values for boot up, you need to do this in the DTS level of the driver. The DTS level of the driver will configure the device upon start up for things that hard requirements such as I2C address. The alsamixer is where the other settings that my need to change based on application will be configured. These alsamixer values typically get retained.

    Regards,

    Aaron

  • Hi Aaron,

    Thanks for clearing that alsamixer clarification. But even though we are configuring the MICBIAS voltage in DTS level of the driver it is not getting reflected in the codec after the board boots up and how we will configure the default values for HP DAC and PCM so that for every boot up those register values will be the same as the user selects.

    So now there are only 2 things to be cleared.

    1. Why MICBIAS voltage is not getting set in the register after the codec boots up?
    2. How to configure the HP DAC and PCM register values by default?

    Please try to clear me these 2 things.

    Regards,

    Ranjith

  • Hello Ranjith,

    For 1, can you look at the message log to see if there are any messages? I believe there is a command like "dmesg". There can be several reasons why the device might not get configured using a DTS config:

    1. The driver was not loaded.

    2. The driver loaded but the I2C was not executed. It is possible the device may have been held in a reset when this command was executed.

    3. The DTS was not understood by the driver. 

    For 2, I am not sure what you mean by this. Can you elaborate? If the HP DAC configuration and PCM need to be configured on boot up, again, these need to be done in DTS level. 

    Regards,

    Aaron

  • Hi Aaron,

    For 1 there is no specific logs coming in dmesg and what we found is that at initial stages of booting the codec is out of reset only but after sometime the codec is going into reset and we don't know why this is happening. But the driver is loaded since while giving i2cdetect command it shows "UU" corresponding to the slave address of the codec which means the driver is controlling that IC.

    The following is the experiment what we had done.
    1. We manually took the codec out of reset and set the MIC BIAS voltage by i2cset command.
    2. We record some audio file and while recording we checked the MICBIAS Control Register, the value in that is what we set using i2cset command.
    3. After recording the audio when we checked the register, the value is 0x02 and even if we again record the audio and check that register the value in it 0x02 only. We've given in the dts file as "ai3x-micbias-vg = <1>;" only but it is not reflecting in the register.

    For 2 we wish to set some default values to the LDAC_VOL, RDAC_VOL, DACL1_2_HPLOUT_VOL and DACR1_2_HPROUT_VOL registers. Can you suggest how we set the default values in DTS level for those registers? Since in the DTS documentation there is nothing specified to control those registers.

    Regards,

    Ranjith

  • Ranjith,

    Let me try to step in and help out. First of all, the DTS instructions are under the kernel.org repo in Documentation/devicetree/bindings/sound

    There is a DTS entry:
    ai31xx-micbias-vg - MicBias Voltage setting
            1 or MICBIAS_2_0V - MICBIAS output is powered to 2.0V
            2 or MICBIAS_2_5V - MICBIAS output is powered to 2.5V
            3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD
    	If this node is not mentioned or if the value is unknown, then
    	micbias	is set to 2.0V.

    So in the DTS, there should be an entry:

    tlv320aic31xx: tlv320aic31xx@18 {
    	compatible = "ti,tlv320aic311x";
    	reg = <0x18>;
    	ai31xx-micbias-vg = <MICBIAS_OFF>;
    	reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
    	HPVDD-supply = <&regulator>;
    	SPRVDD-supply = <&regulator>;
    	SPLVDD-supply = <&regulator>;
    	AVDD-supply = <&regulator>;
    	IOVDD-supply = <&regulator>;
    	DVDD-supply = <&regulator>;
    };

    Looking at the driver:

    https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/sound/soc/codecs/tlv320aic31xx.c?h=v5.9-rc4

    The DTS entries are read in the routine aic31xx_i2c_probe(). For micbias-vg it is in line 1614 and read into the variable micbias_value:

    fwnode_property_read_u32(aic31xx->dev->fwnode, "ai31xx-micbias-vg",
    				 &micbias_value);
    	switch (micbias_value) {
    	case MICBIAS_2_0V:
    	case MICBIAS_2_5V:
    	case MICBIAS_AVDDV:
    		aic31xx->micbias_vg = micbias_value;
    		break;
    	default:
    		dev_err(aic31xx->dev, "Bad ai31xx-micbias-vg value %d\n",
    			micbias_value);
    		aic31xx->micbias_vg = MICBIAS_2_0V;
    	}

    if (dev_get_platdata(aic31xx->dev)) { memcpy(&aic31xx->pdata, dev_get_platdata(aic31xx->dev), sizeof(aic31xx->pdata)); aic31xx->codec_type = aic31xx->pdata.codec_type; aic31xx->micbias_vg = aic31xx->pdata.micbias_vg; }

    I would expect that at this point it would be written to the register, but it is placed in this data structure. This is then handled by a widget for alsamixer common31xx_dapm_widgets in line 540:

    /* Mic Bias */ 
    SND_SOC_DAPM_SUPPLY("MICBIAS", SND_SOC_NOPM, 0, 0, mic_bias_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),

    that creates a mic_bias_event that actually writes to the register with the routine snd_soc_component_update_bits

    static int mic_bias_event(struct snd_soc_dapm_widget *w,
    			  struct snd_kcontrol *kcontrol, int event)
    {
    	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
    	struct aic31xx_priv *aic31xx = snd_soc_component_get_drvdata(component);
    
    	switch (event) {
    	case SND_SOC_DAPM_POST_PMU:
    		/* change mic bias voltage to user defined */
    		snd_soc_component_update_bits(component, AIC31XX_MICBIAS,
    				    AIC31XX_MICBIAS_MASK,
    				    aic31xx->micbias_vg <<
    				    AIC31XX_MICBIAS_SHIFT);
    		dev_dbg(component->dev, "%s: turned on\n", __func__);
    		break;
    	case SND_SOC_DAPM_PRE_PMD:
    		/* turn mic bias off */
    		snd_soc_component_update_bits(component, AIC31XX_MICBIAS,
    				    AIC31XX_MICBIAS_MASK, 0);
    		dev_dbg(component->dev, "%s: turned off\n", __func__);
    		break;
    	}
    	return 0;
    }

    So looks like the DTS entry is read to initially populate this widget and an alsamixer command must be sent to write it to the register.

    If you would like to add more values in DTS, you can add to the aic31xx_i2c_probe routine more code to read the DTS entry as follows:

    1) read a property:

    fwnode_property_read_u32(aic31xx->dev->fwnode, "ai31xx-new-property", &value);

    2) write some bits to the register

    regmap_update_bits(aic31xx->regmap, AIC31XX_REGXX, AIC31XX_REG_MASK, value);

    or write the whole register

    regmap_write(aic31xx->regmap, AIC31XX_REGXX, value);

    3) Add a DTS property:

    tlv320aic31xx: tlv320aic31xx@18 {
    	compatible = "ti,tlv320aic311x";
    	reg = <0x18>;
    	ai31xx-micbias-vg = <MICBIAS_OFF>;
    	reset-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
    	HPVDD-supply = <&regulator>;
    	SPRVDD-supply = <&regulator>;
    	SPLVDD-supply = <&regulator>;
    	AVDD-supply = <&regulator>;
    	IOVDD-supply = <&regulator>;
    	DVDD-supply = <&regulator>;
            ai31xx-new-property = <new_value>;
    };

    Best regards,
    Pedro





  • Hi Pedro,

    Thanks for your detailed suggestion. The suggestions given by you for adding additional DTS entries will be very helpful for us if we wish to add some more entries in the DTS.

    We've made the DTS entry as you had mentioned in your reply with "aic3x-micbias-vg = <1>;" which means MICBIAS output is powered to 2.0V.

    So you mean we've to give the alsamixer command to write into that register after the kernel boots up?

    Regards,

    Ranjith

  • Ranjith,

    Yes, it looks like this driver requires an alsamixer command to write the structure value to the register.

    Best regards,
    Pedro

  • Hi Pedro,

    Thanks for your reply. We will get back to you after verifying this.

    Regards,

    Ranjith