This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLV320AIC3106: Question of the I2S Signal Integrity of the TLV320AIC3106

Part Number: TLV320AIC3106

Hi Sirs,

Does the I2S signal integrity specification of the TLV320AIC3106 datasheet defined by the maximum 50MHz data rate?

Would you please provide the specification with BCLK of 3.072MHz and 1.536MHz?

1. Can 326ns clock period with 3.072MHz BCLK, 652ns clock period with 1.536MHz clock period meet AIC3106's requirement? The test results are close by the calculation of 1/3.072MHz=325.52ns and 1/1,536MHz=651.04ns.

2. Can we refer to the Philips I2S specification as a test standard for the AIC3106? 

  

Thank you and Best regards,

Wayne Chen
08/07/2020