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TAS5805M: Sequence of startup procedures

Jones Hung
Prodigy 40 points
Part Number: TAS5805M
Other Parts Discussed in Thread: TAS5805

Dear TI staff, 

Referring to TAS5805M datasheet in section 9.5.3.1 about startup procedures, it defined that I2S clock must be stable before enabling I2C control in step-4. We are confusing about this description. Can you help to clarify some questions below?

1. I2S clocks must be ready before I2C control is hard requirement or not?

2. Is there any correlation between I2C and I2S in silicon design?

3. If this procedure be reversed, any side effect will be appeared?

Due to our platform use dual OS (Linux and Little Kernel) separately and no inter communication between each other. So I2C will be start up first and I2S will be valid once audio signals available. At this situation, we encountered no sound output from amplifiers randomly (I2C configuration successfully and I2S clock / data are well) and could be recovered by power cycling only. Please let us know what your comment is about this symptom. Thanks.

Regards,

Jones 

  • 0
    TI__Mastermind 19080 points

    Hi Jones,

    1. I2S clocks must be ready before I2C control is hard requirement.

    2. I2C is for control and DSP coefficient register configuration, while I2S is for audio data stream.

    3. If this procedure being reversed, the device can be not initialized properly. Usually the DSP configuration could be cleared when I2S is valid.

    When you encountered the no sound issue, could you check the register 0x03 and 0x68?

    Regards,

    Sam

  • 0 in reply to Sam(MPAA) Zhang
    Prodigy 40 points

    Hi Sam,

    We performed I2C dump while no sound output from specific amplifier and save it as followers.

    root@imx8mmevk:~# i2cdump -f -y 1 0x2f
    No size specified (using byte-data access)
         0 1 2 3 4 5 6 7 8 9 a b c d e f   0123456789abcdef
    00: 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00   ...?............
    10: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00   ?...?...........
    20: 01 07 09 01 00 40 02 00 00 00 00 00 00 00 00 00   ????.@?.........
    30: 00 00 00 02 00 11 00 09 40 08 f9 04 00 20 80 00   ...?.?.?@???. ?.
    40: 01 00 00 00 00 00 01 00 00 00 00 00 30 30 33 30   ?.....?.....0030
    50: 07 00 00 00 00 00 00 00 00 00 00 00 00 f8 00 00   ?............?..
    60: 01 0b 00 00 00 00 87 00 03 03 00 00 00 50 11 24   ??....?.??...P?$
    70: 00 04 00 00 00 38 00 00 00 00 09 03 00 00 9c 00   .?...8....??..?.
    80: 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00   ...?............
    90: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00   ?...?...........
    a0: 01 07 09 01 00 40 02 00 00 00 00 00 00 00 00 00   ????.@?.........
    b0: 00 00 00 02 00 11 00 09 40 08 f9 04 00 20 80 00   ...?.?.?@???. ?.
    c0: 01 00 00 00 00 00 01 00 00 00 00 00 30 30 33 30   ?.....?.....0030
    d0: 07 00 00 00 00 00 00 00 00 00 00 00 00 f8 00 00   ?............?..
    e0: 01 0b 00 00 00 00 87 00 03 03 00 00 00 50 11 24   ??....?.??...P?$
    f0: 00 04 00 00 00 38 00 00 00 00 09 03 00 00 9c 00   .?...8....??..?.

    According to the message above, the registers both of 0x03 and 0x68 are equal to 0x03 (play mode). This configuration seems correct but no sound output from amplifier eventually. So the I2C setting would not be cleared after I2S activation when the I2C and I2S sequence were reversed. 

    Any comments or suggestions for further debugging? Please advise.

    Regards,

    Jones

  • 0 in reply to Jones Hung
    TI__Mastermind 19080 points

    Hi Jones,

    If you look at the Register 0x71, it indicates there is a clock fault.

    As required by the datasheet, I2S clock must be activated first, then comes the I2C configuration. I understand maybe it's difficult to implemented on your system, but I have to say it's a must-to-have for TAS5805...

    Thanks!

    Regards,

    Sam 

  • 0 in reply to Sam(MPAA) Zhang
    Prodigy 40 points

    Hi Sam,

    Thanks for your reply. I think clock fault is a good checkpoint for further investigation. Can you help to clarify relevant questions below.

    1. Please specify which situations will trigger clock fault event. We are curious why it be triggered randomly because our I2S and I2C control sequence always reversed.

    2. If we separate I2C commands to be two portions. One is I2C initialization and the other will focus on DSP coefficient. Please let us know what registers are TAS5805M control purpose and what registers are used for DSP configuration.

    3. According to your understanding, the operation of case-2 is workable or not especially for this use case. Thanks.

    Regards,

    Jones. 

  • 0 in reply to Jones Hung
    TI__Mastermind 19080 points

    Hi Jones,

    Understand your using case.

    1. If the recommended sequence on datasheet are followed, clock fault detects any fault event on I2S clocking like incorrect rate, incorrect SCLK/LRCLK ratio.

    2&3. Please leave me some time to check with our designers. Will get back to you soon.

    Thanks!

    Regards,

    Sam

  • 0 in reply to Jones Hung
    TI__Mastermind 19080 points

    Hi Jones,

    Should be OK. Before I2S clock is applied, please only configure the Page 0 registers; after I2S clock become valid, you can configure other registers including DSP coefficients.

    Thanks!

    Regards,

    Sam