Part Number: DIR9001
Pls kindly help for below questions for DIR9001, thanks.
1. A phase-locked loop circuit attempts to synchronize to the incoming S/PDIF data stream and recover data and clock from it. If the PLL cannot lock, it cannot recover the clock and data. You don't switch between these two states -- PLL lock is a status based. Put simply, if the PLL does not lock, you cannot use the received data as they are not valid.
2. The S/PDIF decoder looks at status bits embedded in the recovered data stream (see the S/PDIF specification). EMPHASIS is used to indicate whether the audio data were encoded with a pre-emphasis filter. Also, S/PDIF can carry non-audio data packets. The AUDIO flag indicates whether it is receiving proper audio data or something else.
3. COUT and UOUT are channel status and user status bits derived from the decoder, and they are clocked out with LRCLK. If you need those status bits they are available.
4. CLKST is asserted when there is a change in PLL lock status. The data sheet tells you all about it.
5. What pins you need to connect to your system processor depends on your application. You might wish to re-read the data sheet.
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In reply to Andy Peters:
I think Andy has you covered but let me know if you have any other questions!
Zak Kaye Precision Data Converter Applications
In reply to Zak Kaye:
Some more questions,
3. Reset default internal is pull up, if direct pull down if need reset?
4. CLKST active H, is open drain?
5. Why DOUT. DATA are MUTE under XT1?
In reply to Ian Wang:
Ian -- please read the data sheet more carefully. The answers are in there.
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