TLV320AIC3101 Low-Power Stereo Audio Codec for Portable Audio/Telephony

Hello Ranjith,

What are you looking to test? Will you be using an external controller/processor to program the device? A bit more detail on what you are using and what you want to test would be helpful here. The EVM will be the easiest way to talk to the device and program it for evaluation. 

Regards,

Aaron

Hi Aaron,

Thanks for your replay.

Currently in my module I have TLV320AIC3101 with relay and transceiver module, There is no external controller or processor to program this device and planning test by applying analog and digital signals and verify the response.

Looking to test the below Functionalities.

1. Single/Differential input test using MIC1LM/LINE1LM and MIC1LP/LINE1LP
2. Analog Input and Digital out (DOUT) test using MIC1LM/LINE1LM and MIC1LP/LINE1LP
3. Digital IN (DIN) and Analog OUT/HPROUT

Please provide if you have any test procedure to test this IC (TLV320AIC3101) in standalone mode, that would be great helpful to evaluate the component functionality or If any other test methodology (Without EVM) also would be great helpful.

Once again thanks for your support.

Regards,

Ranjith

Contact Mobile No: +91 9945936001

email:ranjith.k.krishnan@boeing.com

Hi Aaron,

Thanks for your reply.

I am using external I2C controller to configure the registers for the below test, Kindly check my below configuration will work or not.

Differential test using  MIC1LP/LINE1LP,  MIC1LM/LINE1LM  and read output in LEFT_LOP and RIGHT_LOP:

1. Apply ‘LOW’ for at least 10ns to RESET pin for proper operation.
2. Apply 1-kHz full-scale sine-wave input to LINE1LP and LINE1LM
3. Configuring TLV320AIC3101 registers using I2C to route the input signal to output
4. As per datasheet the TLV320AIC3101 responds to the I2C address of 001 1000 in fast mode.

• Apply 400 kHz (Fast Mode) for ‘SCL’ I2C clock of U6.
• Initiate the I2C communication by START condition.
• Send the 7- bit slave-address byte of 18hex (I2C address of 001 1000).
• Send 8 bit register address and 8-bit Register to configure below registers

Page 0/Register 0: Page Select Register (Select Page0)

Page 0/Register 1: Software Reset Register (Software reset for Registers)

Page 0/Register 3: PLL Programming Register A (Disabling PLL Programming)

Page 0/Register 12: Audio Codec Digital Filter Control Register (Disable the Left-ADC and Right-ADC High-Pass Filter Control)

Page 0/Register 15: Left-ADC PGA Gain Control Register (Not mute the Left-ADC PGA and Set Gain)

Page 0/Register 16: Right-ADC PGA Gain Control Register (Not mute the Right-ADC PGA and Set Gain)

Page 0/Register 19: MIC1LP/LINE1LP to Left-ADC Control Register (Configure ‘LINE1LP’ and ‘LINE1LM’ Differential mode)

Page 0/Register 24: MIC1LP/LINE1LP to Right-ADC Control Register (Configure ‘LINE1LP’ and ‘LINE1LM’ Differential mode)

Page 0/Register 26: Left-AGC Control Register A (Enable and configure Left-AGC)

Page 0/Register 27: Left-AGC Control Register B (set Left-AGC Maximum Gain)

Page 0/Register 28: Left-AGC Control Register C (set Noise Gate Hysteresis Level Control, Left-AGC Noise Threshold Control and Left-AGC Clip Stepping Control)

Page 0/Register 29: Right-AGC Control Register A (set Noise Gate Hysteresis Level Control, Right-AGC Noise Threshold Control and Left-AGC Clip Stepping Control)

Page 0/Register 30: Right-AGC Control Register B (set Right-AGC Maximum Gain)

Page 0/Register 31: Right-AGC Control Register C (set Noise Gate Hysteresis Level Control, Right-AGC Noise Threshold Control and Left-AGC Clip Stepping Control)

Page 0/Register 34: Left-AGC Noise Gate Debounce Register (Set Debounce level)

Page 0/Register 86: LEFT_LOP/M Output Level Control Register (LEFT_LOP/M Output Level Control Register)

Page 0/Register 93: RIGHT_LOP/M Output Level Control Register (RIGHT_LOP/M Output Level Control Register)

Page 0/Register 108: Passive Analog Signal Bypass Selection during Power Down (Configure SW_L0 and SW_R0)

Apply the I2C communication by STOP condition.

5. Read 1-kHz full-scale sine-wave input 0dB at LEFT_LOP and RIGHT_LOP

And I do not know, how to Test DIN and DOUT with out any DSP or Processor. Since it needs the ASI compatible data. I do not have any external processor/Controller for that.

Is it possible to test DIN and DOUT without DSP/Processor by configuring register.

Attached the Sample circuit for reference.

Regards,

Ranjith

1447.Circuit.docx

Hello Ranjith,

The configuration looks good if using the bypass path which it looks like you are. If you need gain, you will need to use the PGA bypass paths. The 

As for reading DIN/DOUT, you will need an external processor to do so. The CODEC can act as the Primary device and supply BCLK and WCLK signals but the external processor will need to be set up to accept the data at the appropriate sampling rate. 

Regards,

Aaron

Hi Aaron,

   I'm sorry to disturb you。

   I have a trouble for  this on the forums,so post this for you in this way.

      At present, TLV320AIC3101 evm-pdk is used to test the performance of TLV320AIC3101, but there is no output at the lineout. The test method is as follows：

     （1）The differential signal is input at j61n1l and j141n1r, and the amplitude of input sine signal is 0.707vrms, 1kHz

     （2）The jump on the board is set according to the default settings in the guide manual.

   The test process and register configuration are shown in the document: 3101 configuration document

3101configuration.docx

      What are the problems? thank you!

Hi Aaron,

   I'm sorry to disturb you。

   I have a trouble for  this on the forums,so post this for you in this way.

     Update.

   At present, TLV320AIC3101 evm-pdk is used to test the performance of TLV320AIC3101, but there is no output at the lineout. The test method is as follows：

        (1）The differential signal is input at j61n1l and j141n1r, and the amplitude of input sine signal is 0.707vrms, 1kHz

     （2）The jump on the board is set according to the default settings in the guide manual.

At present, what is unclear is:

When tlv320aic3101evm and usbmodevm are used together, the jumpers of the two EVMS are set according to tlv320aic310evm and tlv320aic3101evm-pdk user guide.

1. After connecting the USB capsule, configure the register according to 3101 configuration document. The oscilloscope can see data output at dout. However, if the in1l and in1r of audio input / ADC are muted, there is still data output at dout? Why?I do not know.
2.  In Left_ Out and Right_ OUT,There is no sine wave . Why?
3. Do you need to short circuit at dout and din?
4. Input signals at in1l and in1r, and  at left_ Out and right_ OUT,Do I see the waveform at out? What else do I need?

    The test process and register configuration are shown in the document: 3101 configuration document

1385.3101configuration.docx

      What are the problems? thank you!

 HAI 

Hello Hai,

Go to the command promp tab and enter the following for a passive analog bypass path. 

w 30 6C 33 

This should route LINE1LP/M to LEFT_LOP/M and LINE1RP/M to RIGHT_LOP/M. Are you not needing the ADCs or DACs?

Regards,

Aaron

Hello Aaron，

  Tanks for your reply.

  I need ADC and DAC. But i do not know how to configure the hardware and software.

 Can you tell me how to test the performance of ADC and DAC?

 And i want to know if the ADC and DAC is test separately?

 And Can you tell me how to configure the hardware and software?

   Regards!

 HAI

Hi Aaron,

Thanks for your reply.

As you mentioned above, I am using below registers to configure for gain control.

Table 83. Page 0/Register 81: PGA_L to LEFT_LOP/M Volume Control Register (1: PGA_L is routed to LEFT_LOP/M and using 7-bit register setting versus analog gain values, see Table 51).

Table 90. Page 0/Register 88: PGA_L to RIGHT_LOP/M Volume Control Register (1: PGA_L is routed to RIGHT_LOP/M and using 7-bit register setting versus analog gain values, see Table 51).

Table 108.Page 0/Register 108: Passive Analog Signal Bypass Selection During Power Down (Normal Signal path).

Thanks for clearing my doubt on DIN/DOUT.

Regards,

Ranjith

Hello Hai,

Are your questions related to Ranjith's? If not, to avoid confusion, please send me a private message and we can discuss future questions there. 

Regards,

Aaron