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PCM1794A: Operation of DF Bypass mode

Y.Ottey
Mastermind 6145 points
Part Number: PCM1794A

Dear TI team

I would like to ask about PCM1794A.

Our customer is considering using the PCM1794A in DF-Bypass mode.
I would like you to tell me about the following.

1.Our customers are trying to use with the following settings
(Sampling cycle is 128kHz)
・ SCK: 32.768MHz
・ BCK: 8.192MHz
・ WDCK: 128kHz
The above frequencies were not mentioned in the data sheet, but is there any problem with the above settings?
(Is it possible to use the above frequencies by calculating from the External Digital Filter Application Timing Requirements in the data sheet?)

2.Regarding DF Bypass mode, I checked the data sheet to see what the output waveform would look like, but there was no reference measurement waveform.
Is there any data of the output waveform in DF Bypass mode?
(I want to know whether it is output at a constant voltage or oscillated at a certain frequency.)

Best Regards,
Y.Ottey

  • 0
    TI__Guru 52663 points

    Hi Y.Ottey,

    1. Those values are okay for the external filter mode.  Note that you probably do not need 64bit per sample BCK clock.

    2. This mode bypasses the digital filter inside the device, which is why we recommend that you operate the external filter at 4x or 8x the desired sample rate.  The output of a delta-sigma modulator is never truly constant.  The output is oversampling to create an average value at the output.  By filtering the output you do not see this fast switching on the output.

    Thanks,

    Paul

  • 0 in reply to Paul_Frost
    Mastermind 6145 points

    Dear Paul

    Thank you for  your reply.

    I would like to ask adding questions.

    "we recommend that you operate the external filter at 4x or 8x the desired sample rate."

    As mentioned above, is it okay to recognize that it is performed with the External Filter Device, which is the red circle in the figure below?
    Also, what value should be set to 4 times or 8 times the Sampling rate?


    "By filtering the output you do not see this fast switching on the output."

    As mentioned above, is an external filter circuit required on the output side in the case of DF-Bypass mode?
    Also, if there is no external filter circuit on the output side, will the output of the PCM1794A confirm the fast switching you described?
    (Does the output waveform look like it is oscillating?)

  • 0 in reply to Y.Ottey
    TI__Guru 52663 points

    Hi Y.Ottey,

    If you are using the external DF mode with fS = 128ksps, then you will see analog performance similar to using the internal DF mode with an fS of 16ksps or 32ksps. 

    The output filter is to remove the switching noise of delta-sigma modulator, which looks like the output is noisy.  it probably should not be described as "oscillating", but rather similar to a PWM output.

    Thanks,

    Paul

  • 0 in reply to Paul_Frost
    Mastermind 6145 points

    Hi Frost

    I would like to ask adding questions.

    1. The Audio Format in DF Bypass mode is as shown in the figure below.
    Our customer is using it in the situation where the MSB of DATA is located after the rise of WDCK (red line part). (WDCK = 128kHz, BCK = 8.192MHz)

    Is this usage okay?

    2.Our customers are in the following situations(If you like, send the waveform as a private message.)

    (1) When the signal is input so that the output becomes a constant voltage with the DF Bypass mode set to Disenable, the output is output at a constant voltage as expected.
    (2) When the same signal as (1) is input with DF-Bypass mode enabled, an oscillated waveform is output (it does not reach a constant voltage).

    If I change the DF Bypass mode from Disenable to Enable, does the above phenomenon occur?

    Regards,

    Y.Ottey

  • 0 in reply to Y.Ottey
    TI__Guru 52663 points

    Hi Y.Ottey,

    1. Are they only using 16-bit data? The device will latch the most recent 24bits before the falling edge of WDCK.  Are they providing exactly 24 bits of data after the rising edge of WDCK? 

    Could they share a scope shot of their data format and the DAC output? 

    Thanks,

    Paul

  • 0 in reply to Paul_Frost
    TI__Guru 52663 points

    You can send the images to frost@ti.com.

    Thanks,

    Paul

  • 0 in reply to Paul_Frost
    Mastermind 6145 points

    Hi Paul

    Thank you for your reply and email address.
    We are currently asking our customers to measure the Audio Format.

    I have an additional question to ask.
    1. I will ask you again, for example, can Format be used with Digital fiflter bypass (DF bypass mode) with the following settings?
    ・ Sampling rate: 128kHz
    ・ SCK: 32.768MHz
    ・ BCK: 8.192MHz
    ・ WDCK: 128kHz

    I think it would be better to change the sampling rate to 32kHz (WDCK ÷ 4) or BCK to 4.096MHz (128kHz x 32).

    2. When changing the Format from I2S or Standard to Defital filter bypass, is it necessary to change not only the pin setting but also the above frequency setting?

    Best Regards,
    Y.Ottey

  • 0 in reply to Y.Ottey
    Mastermind 6145 points

    Dear Paul

    I have received a request from our customer to find out the answer to an additional question I posted before measuring the Audio Format.
    I would be happy if you could get a reply as soon as possible.

    Regards,
    Y.Ottey

  • 0 in reply to Y.Ottey
    TI__Guru 52663 points

    Hi Y.Ottey,

    1. In this case, I think BCK = 32×WDCK is best.  Technically, they can use 64×WDCK, but that is not necessary to clock in the significant right-justified, 24 bits.

    2. The external mode operates the device exclusively in mono mode.  So you do not necessarily need to change the rates, assuming BCK=64×WDCK/LRCK.

    Thanks,

    Paul