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PCM1802: Power Down mode and Power on Reset

Part Number: PCM1802

Hi,

When the device enters power-down mode, is the internal power-on reset activated?

I would like to know if we should wait during 4084/fs after removing power-down mode as below.

Best Regards,

Kuramochi

  • Hi Kuramochi-san,

    Yes, the internal power-on-reset is asserted when the device enters power-down however the power-on-reset get de-asserted only after 1024 system-clock counts after VDD raised back above 2.2V (typical).

    After power-on-reset de-assertion, the device will give zero data on DOUT for 4480 I2S frames. Host device need not to wait and can start recording the I2S data after power-supply ramp but just that the data will be zero for initial 4480 frames and proper recorded non-zero data is expected to be available only after this initial frames.

    Regards,

    Uttam