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TLV320AIC3104: TLV320AIC3104 pop noise

Part Number: TLV320AIC3104

hi Team :
1 codec chips: TLV320AIC3104

1.1 kernel version : 3.18.48

1.2 questions in short : heard a pop noise when we make a phone call . 

1.3  questions in details :

1.3.1 the trouble is if we mute too early ,the head words of this phone call will be lost . Mute too late,the pop noise has been heard.

1.3.2  in addition, that noise didn't caused by channel switch .The output channel are opened since reset(power on ).

1.3.3 it's not a certain delta Time between call out and  connected in .so that's hard to thinking in Linear time invariant ways.

  • Hi Jack,

    Thank you for your question. Many of our engineers are taking vacation due to the Christmas holiday in the US. Once they return from the holiday, they will address your question. I apologize for any inconvenience this causes. 

  • Hello Jack,

    Can you please provide a schematic and register dump so we can help debug further? Some information on which output the pop is heard on would also help. 

    Regards,

    Aaron

  •  hi team:

    1  that's the schematic we are using .

    2  but  how to dump all the two page registers out  at ubuntu 20.04  ? Or using printk prints them out one by one  ?

    thanks

  • hi team :

    u can hear that pop at 12.3 second

    thanks

  • Hello Jack,

    For the register dump, I am not familiar with your system but if there is a way to dump all the register data, that would be very helpful. Looking at the schematic, I see two things that should be corrected..

    - Unused analog inputs should be AC coupled to GND via 0.47uF capacitor. To save board space, all unused inputs can be tied together and AC coupled to GND via a single capacitor. 

    - The decoupling cap on MICBIAS pin should be removed. MICBIAS is a very clean signal and does not need this cap. 

    To understand more about the pop noise, does the device get configured in any way when this pop happens? For example, is the ADC powered on or is the PGA unmuted/gain increased when this happens?

    Regards,

    Aaron Estrada

  • hi team :

    1 We had tried a few  times to debug soc (qualcomm  A7 1.3GHZ) :

    1.1  The pop noise couldn't be heard  before I2S input (already cleaned by qualcomm soc team).

    1.2 But we still  have got  a pop noise after I2s .And the  microphone was disconnected .

    thanks !

  • Hi Jack,

    So has the situation been narrowed down to the SoC? If the pop noise isn't heard before I2S, this makes me think the pop is not coming from the CODEC. Is my understanding correct?

    Regards,
    Aaron Estrada

  • hi team :

    the follow is debug record of the last month

    topic modules debugs steps we have tried debug steps after change status author
    pop noise qualcomm  arm soc
    Cortex-A7 1.2GHz, ARMv7
    we have got a pop noise
    Before I2S output to CODEC
    1 Qualcomm soc team adjusted their
    Inner DSP parameters.
    2 adjust → re-test for 3 weeks.
    pop noise have already cleaned
    Before I2S input to CODEC.
    But we still can hear that pop noise
    after codec. Pop noise
    May be come from other modules
    qualcomm soc team
    Micro phone sound path It may be come from MIC disconnect the MIC circuit from hardware board. pop noise still can be heard Pop noise
    May be come from other modules
    autolink R&D team
    CAR SPEAKERS 40W It may be come from SPEAKERS 1 disconnect the CAR Speakers .
    2 replaced it by 3.5mm earphone.
    pop noise still can be heard from earphone
    codec channel switch
    TLV320aic3104
    It may be come from channel switch 1 switch to line out channel and keep it after power up(reset).
    2 don’t have to switch channel every time when phone-call coming in
    Needn’t switch channel
    pop noise still can be heard
    CODEC TI TEAM

    thanks

  •  hi team :

    1 anyway,how could i see the playback path /mic record path (viewable)?

    1.1 just like this picture from datasheets ?

    2 I'm going to got a  TLV320AIC3104 Evaluation Module and USB Motherboard at the near future ,

    2.1 https://www.ti.com/tool/TLV320AIC3104EVM-K?keyMatch=TLV320AIC3104&tisearch=Search-EN-everything&usecase=GPN

    2.2 does it can help me to  locate  the pop noise ?

    thanks

  • Hi Jack,

    The block diagram is the best way to view the internal paths of the CODEC. The EVM/GUI cannot help locate pop noises. When it comes to pops/clicks there are several ways to mitigate them on the CODEC side. 

    - Configuration sequence. Configuration sequence has a lot to do with helping mitigate pops. Generally the DAC, ADCs and output drivers should be powered on but muted. Then unmute after a small delay. I can provide a more detailed sequence if needed. 

    - Changing gain on the fly. The device is not equipped to handle gain changes on the fly. PGA should be muted and the ADCs/DACs should be powered down. Then gain changes can occur and the blocks may be powered back on and unmuted. 

    - HPOUTs have a pop suppression feature and this is configurable. 

    - Line outputs will always have some pops in them and pop suppression will need to be handled by the external amplifier. 

    Regards,

    Aaron Estrada

  • hi team:

    1  HPLOUT HPLCOM  HPROUT HPRCOM  has been used  .Line out paths haven't been used.

    2   register 42  be used to de-pop ,but it didn't work as we expected. page0 reg 42 value:0x68 100ms 2ms.

    3 hardware design team have followed your tips to adjust their on-board parameters(cap, idle pin etc), they might be need more hours to test-analyses.

    4 the follow is aic3x_init for 3104 in our project.

    static int aic3x_init(struct snd_soc_codec *codec)
    {
        struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
        snd_soc_write(codec, AIC3X_PAGE_SELECT, PAGE0_SELECT);
        snd_soc_write(codec, AIC3X_RESET, SOFT_RESET);

        /* DAC default volume and mute */
        snd_soc_write(codec, LDAC_VOL, 0);
        snd_soc_write(codec, RDAC_VOL, 0);

        /* DAC to Line Out default volume and route to Output mixer */
        snd_soc_write(codec, DACL1_2_LLOPM_VOL, ROUTE_ON);
    #if 0
        snd_soc_write(codec, DACL1_2_HPLOUT_VOL, ROUTE_ON);
        snd_soc_write(codec, DACL1_2_HPLCOM_VOL, ROUTE_ON);

        snd_soc_write(codec, DACR1_2_HPROUT_VOL, ROUTE_ON);
        snd_soc_write(codec, DACR1_2_HPRCOM_VOL, ROUTE_ON);
    #endif
        snd_soc_write(codec, DACL1_2_HPLOUT_VOL, MUTE_ON);
        snd_soc_write(codec, DACL1_2_HPLCOM_VOL, MUTE_ON);

    #if 1  
        snd_soc_write(codec, DACR1_2_HPROUT_VOL, MUTE_ON);
        snd_soc_write(codec, DACR1_2_HPRCOM_VOL, MUTE_ON);
    #endif
    #if 0
        snd_soc_write(codec, DACR1_2_HPROUT_VOL, ROUTE_ON);
        snd_soc_write(codec, DACR1_2_HPRCOM_VOL, ROUTE_ON);
    #endif
        snd_soc_update_bits(codec, LLOPM_CTRL, UNMUTE, UNMUTE);
        snd_soc_update_bits(codec, RLOPM_CTRL, UNMUTE, UNMUTE);

        snd_soc_update_bits(codec, HPLOUT_CTRL, MUTE_ON, MUTE_ON);
        snd_soc_update_bits(codec, HPLCOM_CTRL, MUTE_ON, MUTE_ON);

        #if 1     
        snd_soc_update_bits(codec, HPROUT_CTRL, MUTE_ON, MUTE_ON);
        snd_soc_update_bits(codec, HPRCOM_CTRL, MUTE_ON, MUTE_ON);
        #endif

        #if 0
        snd_soc_update_bits(codec, HPROUT_CTRL, UNMUTE, UNMUTE);
        snd_soc_update_bits(codec, HPRCOM_CTRL, UNMUTE, UNMUTE);
        #endif

        snd_soc_write(codec, LADC_VOL, 0x00);
        snd_soc_write(codec, RADC_VOL, 0x00);
        snd_soc_write(codec, LINE1R_2_LADC_CTRL, 0x40);
        
        //mic
        snd_soc_write(codec, LINE1R_2_LADC_CTRL, 0x00);
        snd_soc_write(codec, LINE1R_2_RADC_CTRL, 0x00);

        //DAC_R1 to LEFT_LOP/M Volume Control
        snd_soc_write(codec, DACR1_2_LLOPM_VOL, 0x80);

        switch (aic3x->model) {
        case AIC3X_MODEL_3X:
        case AIC3X_MODEL_33:
            //aic3x_mono_init(codec); //reserved for 3104
            break;
        case AIC3X_MODEL_3007:
            snd_soc_write(codec, CLASSD_CTRL, 0);
            break;
        }

    thanks

  • Hi Jack,

    Thanks for sharing this information. Regarding the configuration sequence, I can go into more detail here and recommend the following sequence:

    First, configure the clocks/PLL/digital audio format. Once these are all configured, configure input/outputs:

    For the outputs,  make sure that Soft-stepping is enabled, and if any BiQuads are being used, the filter coefficients should be programed before the DAC is powered.

    Power up DACs but keep them muted, then power up output blocks (keeping them muted), once the output block is fully powered up, unmute the output block. 

    The HPOUTs have the option to weakly drive the outputs to the common mode voltage when powered down. in battery powered applications, this is not ideal, but for other applications this is a great way to reduce the any residual artifacts from the pop/click suppression.

    Additionally, if the HPOUTs are AC coupled, make sure that P0, R14 Bit-D7 is set accordingly.

    Regards,

    Aaron Estrada

  • hi team:

    1 this is register dump :

    / # i2cdump -f -y 4 0x18
    No size specified (using byte-data access)
         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
    00: 00 00 00 91 14 12 c0 0a 00 00 00 01 00 00 00 00    ...?????...?....
    10: 00 ff ff 7c 78 00 04 78 78 06 00 fe 00 00 fe 00    ...|x.?xx?.?..?.
    20: 00 00 00 00 cc c0 00 00 00 00 00 00 30 00 00 80    ....??......0..?
    30: 00 00 00 87 00 00 80 00 00 00 87 00 00 00 00 00    ...?..?...?.....
    40: 80 87 00 00 00 00 00 80 87 00 00 00 00 00 00 00    ??.....??.......
    50: 00 00 80 00 00 80 0b 00 00 00 00 00 00 0b de 0c    ..?..??......???
    60: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00    ......?.........
    70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    80: 00 00 00 91 14 12 c0 0a 00 00 00 01 00 00 00 00    ...?????...?....
    90: 00 ff ff 7c 78 00 04 78 78 06 00 fe 00 00 fe 00    ...|x.?xx?.?..?.
    a0: 00 00 00 00 cc c0 00 00 00 00 00 00 30 00 00 80    ....??......0..?
    b0: 00 00 00 87 00 00 80 00 00 00 87 00 00 00 00 00    ...?..?...?.....
    c0: 80 87 00 00 00 00 00 80 87 00 00 00 00 00 00 00    ??.....??.......
    d0: 00 00 80 00 00 80 0b 00 00 00 00 00 00 0b de 0c    ..?..??......???
    e0: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00    ......?.........
    f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    thanks

  • Hello Jack,

    Thanks for sending the configuration over. To better understand the pop behavior, does this pop happen when the codec is powered? If the codec is already powered at that point, is there any other configuration that happens on the codec side? For example, enabling ADC, unmuting PGA, etc.

    Can you also confirm the WCLK and BCLK frequencies and what sample rate you wish to operate at?

    Regards,

    Aaron Estrada