TLV320AIC3104: Rollover observed on ADC

Alex Huynh

Part Number: TLV320AIC3104

Hi,

My team and I are currently observing something that we find strange. We are using the input LINE2L for our application and have verified that the input levels are in the mV range and should not be saturating the input. When we raise the PGA level, we can hear saturation in our recordings which so far is understandable. What we don't understand is when we analyze the digital data of our recordings, we observe rollovers on the digital values that exceed the peaks. We were expecting clipping instead and because of this rollover, the saturation sound more like distortion therefore sounding very bad.

Our application is running the CODEC at 32bit signed PCM with 16kHz sampling in I2S mode. Here is a figure showcasing our issue. It is a 1kHz tone captured by our microphone into LINE2L which is then digitalized. I have also attached a dump of the registers of the CODEC.

Best regards,

Alex

codec_reg.txt

codec readreg 0
 codec readreg 0


0x0




pts>codec readreg 1
 codec readreg 1


0x0




pts>codec readreg 2
 codec readreg 2


0x44




pts>codec readreg 3
 codec readreg 3


0x91




pts>codec readreg 4
 codec readreg 4


0x80




pts>codec readreg 5
 codec readreg 5


0x0




pts>codec readreg 6
 codec readreg 6


0x0




pts>codec readreg 7
 codec readreg 7


0x8




pts>codec readreg 8
 codec readreg 8


0x0




pts>codec readreg 9
 codec readreg 9


0x30




pts>codec readreg 10
 codec readreg 10


0x0




pts>codec readreg 11
 codec readreg 11


0x81




pts>codec readreg 12
 codec readreg 12


0x0




pts>codec readreg 13
 codec readreg 13


0x0




pts>codec readreg 14
 codec readreg 14


0x0




pts>codec readreg 15
 codec readreg 15


0x4A




pts>codec readreg 16
 codec readreg 16


0x80




pts>codec readreg 17
 codec readreg 17


0x0




pts>codec readreg 18
 codec readreg 18


0xF0




pts>codec readreg 19
 codec readreg 19


0xFC




pts>codec readreg 20
 codec readreg 20


0x78




pts>codec readreg 21
 codec readreg 21


0xF8




pts>codec readreg 22
 codec readreg 22


0xF8




pts>codec readreg 23
 codec readreg 23


0x78




pts>codec readreg 24
 codec readreg 24


0xF8




pts>codec readreg 25
 codec readreg 25


0x86




pts>codec readreg 26
 codec readreg 26


0x0




pts>codec readreg 27
 codec readreg 27


0xFE




pts>codec readreg 28
 codec readreg 28


0x0




pts>codec readreg 29
 codec readreg 29


0x0




pts>codec readreg 30
 codec readreg 30


0xFE




pts>codec readreg 31
 codec readreg 31


0x0




pts>codec readreg 32
 codec readreg 32


0x0




pts>codec readreg 33
 codec readreg 33


0x0




pts>codec readreg 34
 codec readreg 34


0x0




pts>codec readreg 35
 codec readreg 35


0x0




pts>codec readreg 36
 codec readreg 36


0xC0




pts>codec readreg 37
 codec readreg 37


0x80




pts>codec readreg 38
 codec readreg 38


0x0




pts>codec readreg 39
 codec readreg 39


0x0




pts>codec readreg 40
 codec readreg 40


0x0




pts>codec readreg 41
 codec readreg 41


0x0




pts>codec readreg 42
 codec readreg 42


0x0




pts>codec readreg 43
 codec readreg 43


0x0




pts>codec readreg 44
 codec readreg 44


0x80




pts>codec readreg 45
 codec readreg 45


0x0




pts>codec readreg 46
 codec readreg 46


0x0




pts>codec readreg 47
 codec readreg 47


0x80




pts>codec readreg 48
 codec readreg 48


0x0




pts>codec readreg 49
 codec readreg 49


0x0




pts>codec readreg 50
 codec readreg 50


0x0




pts>codec readreg 51
 codec readreg 51


0x9F




pts>codec readreg 52
 codec readreg 52


0x0




pts>codec readreg 53
 codec readreg 53


0x0




pts>codec readreg 54
 codec readreg 54


0x80




pts>codec readreg 55
 codec readreg 55


0x0




pts>codec readreg 56
 codec readreg 56


0x0




pts>codec readreg 57
 codec readreg 57


0x0




pts>codec readreg 58
 codec readreg 58


0x9F




pts>codec readreg 59
 codec readreg 59


0x0




pts>codec readreg 60
 codec readreg 60


0x0




pts>codec readreg 61
 codec readreg 61


0x0




pts>codec readreg 62
 codec readreg 62


0x0




pts>codec readreg 63
 codec readreg 63


0x0




pts>codec readreg 64
 codec readreg 64


0x0




pts>codec readreg 65
 codec readreg 65


0x4




pts>codec readreg 66
 codec readreg 66


0x0




pts>codec readreg 67
 codec readreg 67


0x0




pts>codec readreg 68
 codec readreg 68


0x0




pts>codec readreg 69
 codec readreg 69


0x0




pts>codec readreg 70
 codec readreg 70


0x0




pts>codec readreg 71
 codec readreg 71


0x0




pts>codec readreg 72
 codec readreg 72


0x4




pts>codec readreg 73
 codec readreg 73


0x0




pts>codec readreg 74
 codec readreg 74


0x0




pts>codec readreg 75
 codec readreg 75


0x0




pts>codec readreg 76
 codec readreg 76


0x0




pts>codec readreg 77
 codec readreg 77


0x0




pts>codec readreg 78
 codec readreg 78


0x0




pts>codec readreg 79
 codec readreg 79


0x0




pts>codec readreg 80
 codec readreg 80


0x0




pts>codec readreg 81
 codec readreg 81


0x0




pts>codec readreg 82
 codec readreg 82


0x0




pts>codec readreg 83
 codec readreg 83


0x0




pts>codec readreg 84
 codec readreg 84


0x0




pts>codec readreg 85
 codec readreg 85


0x0




pts>codec readreg 86
 codec readreg 86


0x0




pts>codec readreg 87
 codec readreg 87


0x0




pts>codec readreg 88
 codec readreg 88


0x0




pts>codec readreg 89
 codec readreg 89


0x0




pts>codec readreg 90
 codec readreg 90


0x0




pts>codec readreg 91
 codec readreg 91


0x0




pts>codec readreg 92
 codec readreg 92


0x0




pts>codec readreg 93
 codec readreg 93


0x0




pts>codec readreg 94
 codec readreg 94


0x84




pts>codec readreg 95
 codec readreg 95


0x8




pts>codec readreg 96
 codec readreg 96


0x0




pts>codec readreg 97
 codec readreg 97


0x0




pts>codec readreg 98
 codec readreg 98


0x0




pts>codec readreg 99
 codec readreg 99


0x0




pts>codec readreg 100
 codec readreg 100


0x0




pts>codec readreg 101
 codec readreg 101


0x0




pts>codec readreg 102
 codec readreg 102


0xA2




pts>codec readreg 103
 codec readreg 103


0x0




pts>codec readreg 104
 codec readreg 104


0x0




pts>codec readreg 105
 codec readreg 105


0x0




pts>codec readreg 106
 codec readreg 106


0x0




pts>codec readreg 107
 codec readreg 107


0x0




pts>codec readreg 108
 codec readreg 108


0x0




pts>codec readreg 109
 codec readreg 109


0x0




pts>codec readreg 110
 codec readreg 110


0x0




pts>codec readreg 111
 codec readreg 111


0x0




pts>codec readreg 112
 codec readreg 112


0x0




pts>codec readreg 113
 codec readreg 113


0x0




pts>codec readreg 114
 codec readreg 114


0x0




pts>codec readreg 115
 codec readreg 115


0x0




pts>codec readreg 116
 codec readreg 116


0x0




pts>codec readreg 117
 codec readreg 117


0x0




pts>codec readreg 118
 codec readreg 118


0x0




pts>codec readreg 119
 codec readreg 119


0x0




pts>codec readreg 120
 codec readreg 120


0x0




pts>codec readreg 121
 codec readreg 121


0x0




pts>codec readreg 122
 codec readreg 122


0x0




pts>codec readreg 123
 codec readreg 123


0x0




pts>codec readreg 124
 codec readreg 124


0x0




pts>codec readreg 125
 codec readreg 125


0x0




pts>codec readreg 126
 codec readreg 126


0x0




pts>codec readreg 127
 codec readreg 127


0x0




pts>

over 3 years ago

0 Alex Huynh over 3 years ago

Prodigy 60 points

Please find attached another figure that illustrate the problematic more clearly. This is a 1kHz tone sampled at 16kHz with 16bit width data in I2S mode. We see that there is no clipping and in fact, we are losing a lot of the dynamic range.

0 Tom Hendrick over 3 years ago in reply to Alex Huynh

TI__Guru**** 168605 points

Hi Alex,

I'm sorry for the delay in responding to your query, we've had a bit of excitment here in Dallas due to an unsual cold spell which has knocked out power and water to much of the team. We will get back to you as soon as possible with answers to your questions.

In the meantime, can you verify page 0,register 10 is set properly? The screen capture looks like a formatting issue and you may have missed the 1-bit shift of the data in I2S mode (see section 10.3.2.3).

0 Alex Huynh over 3 years ago in reply to Tom Hendrick

Prodigy 60 points

Hi Tom,

Hope everything is going better at Dallas.

This could be it... I will try this when I have the chance and let you know.

Best Regards,

Alex

0 Tom Hendrick over 3 years ago in reply to Alex Huynh

TI__Guru**** 168605 points

Hi Alex,

Yes - nearly back to normal here. Do let us know when you've had a chance to verify the bit shift.

0 Alex Huynh over 3 years ago in reply to Tom Hendrick

Prodigy 60 points

Hi Tom,

It worked, we are finally getting the full data. However, we don't understand why is this register needed. We would like to comprehend fully if you don't mind.

Is the above the default formatting? Or is there no offset by default and we have to set it ourselves by 1. When we looked at the application notes, it never mentioned the need to use register 10. Our application takes into account the formatting of the above figure where data is valid on the second rising edge of the bit clock.

Regards,

Alex

0 Aaron Estrada over 3 years ago in reply to Alex Huynh

TI__Mastermind 22950 points

Hi Alex,

Register 10 is actually used to create offsets for TDM mode. If adding a 1-bit offset helps with the audio recording, I would double check that the host processor is set up to receive data in the I2S format above.

If you can also provide a register dump, I can take a look at the register configurations to ensure that nothing looks out of the ordinary.

Regards,

Aaron Estrada

0 Alex Huynh over 3 years ago in reply to Aaron Estrada

Prodigy 60 points

Hi Aaron,

So you are saying that register 10 should not have solved this? By setting it to 1, are we essentially having the MSB of the valid data at the third rising edge of the bit clock?

You can find the register dump in my original post. The only difference is now I have register 10 set to 1. I can provide you with the new register dump tomorrow as I am not in the office currently but it should be what I just described.

We are using a LPC1788 from NXP as our microcontroller and even in its user manual it describes I2S protocol as so.

The data is automatically placed into 32 bits FIFO and no data processing is done.

Regards,

Alex

0 Aaron Estrada over 3 years ago in reply to Alex Huynh

TI__Mastermind 22950 points

Hello Alex,

The CODEC will output data in the I2S format specified in the data sheet. Because of this, I am thinking two things... The first being that the CODEC output does not have this 1 bit shift (possibility that the PLL may be causing this) and second, the NXP microcontroller is expecting an extra bit shift.

I am not familiar with the LPC1788 so I can't say for certain but is there any way to add offsets? I would double check on the microcontroller side just to be sure. On the CODEC side, I see you have the PLL configured and it looks like it is expecting an input clock of 3.072Mhz. Is this correct?

Moving forward, I would also recommend taking scope captures of the ASI bus. If you can get WCLK, BCLK and DOUT on the same capture, that would be great.

Regards,

Aaron Estrada

0 Alex Huynh over 3 years ago in reply to Aaron Estrada

Prodigy 60 points

Hello Aaron,

I can now see clearly that the CODEC outputs the data in the I2S format specified in the datasheet. I have attached some scope capture with different offset just to check its effect on the data and it is as you said. We will continue investigating our application. No the microcontroller doesn't seem to have any registers for playing with the offsets.

Regards,

Alex