Other Parts Discussed in Thread: TAS2563
Hi Sirs,
We are supporting a mono TAS2563 QFN's application. The TAS2563 QFN PPC3 does not send the algorithm output on SDOUT (SDOUT keeps flat), hence we are trying to rework the CFG to end algorithm output on SDOUT.
The OUTMUX option seems not work.
The TAS2563 can send SDOUT with the CFG below. However, it can send channel left's SDOUT on channel left's slot, and keeps flat on channel right.
CH1 = SDIN
CH2 = SDOUT
Here we need product line's help in reworking the CFG to send downmixed algorithm output (L+R)/2 on both LRCK slots.
Sample rate is 16kHz in this case.
----------------------------------------------------
w 98 00 00
w 98 7f 00
w 98 02 02 #
w 98 0b 42 # algo-in with slot 2
w 98 0c 40 # algo-out with slot 0
w 98 00 00
w 98 7f 00
w 98 00 09
w 98 2c 00 # algo-out/in
> 00
> 00
> 01
w 98 00 00
w 98 7f 00
----------------------------------------------------
Thank you and Best regards,
Wayne Chen
02/26/2021
