Other Parts Discussed in Thread: AM3354, , REG102, REG101
Tool/software: Starterware
Hi all:
I'm using the TLV320AIC3106 in the I2S slave mode, I drived the am3354 outputs the MCLK BCLK and the WCLK.
Unfortunately I got a high frequency noise when playing. Before this , we using the master mode with 12M OSC output the MCLK , it works well.
this is the TLV320AIC3106 Reg cfg in slave mode:
/*RESET */
AIC31_P0_REG0, 0
AIC31_P0_REG1, 0x80
/* I2S and 16 bit */
AIC31_P0_REG9, 0x10
AIC31_P0_REG10, 0
AIC31_P0_REG2, 0x00
AIC31_P0_REG3, 0x82
/* use PLL_CLK_IN as MCLK */
AIC31_P0_REG102, 0x08
/* Use PLL DIV OUT as codec CLK IN */
AIC31_P0_REG101, 0x00
/* Select GPIO to output the divided PLL IN */
AIC31_P0_REG98, 0x20
AIC31_P0_REG4, 7 << 2
/* Configure the PLL divide registers */
AIC31_P0_REG5, (5264 >> 6) & 0xFF
AIC31_P0_REG6, (5264 & 0x3F) << 2
AIC31_P0_REG11, 1
/* Enable the codec to be master for fs and bclk */
AIC31_P0_REG8, 0x10
AIC31_P0_REG7, 0x8a
/* power up the left and right DACs */
AIC31_P0_REG37, 0xE0
/* select the DAC L1 R1 Paths */
AIC31_P0_REG41, 0x02
AIC31_P0_REG42, 0x6C
/* DAC L to LEFT_LOP Is connected */
AIC31_P0_REG82, 0x80
AIC31_P0_REG86, 0x09
/* DAC R to RIGHT_LOP/M is connected */
AIC31_P0_REG92, 0x80
AIC31_P0_REG93, 0x09
/* unmute the DAC */
AIC31_P0_REG43, 0x00
AIC31_P0_REG44, 0x00
/*output common-mode voltage 1.5v*/
AIC31_P0_REG40, 0x40
In master mode I changed the reg8 to 0xD0 and make am3354 outputs BCLK WCLK , it works fine.
PS: when I change the sample rate lower, I can filter the noise, but it filter the high frequency voice as well.
Anyone help me ?
