TAS6424Q1EVM: I2C design parameters for this part?

Meant I2S parameters, not I2C, got that working just fine!

Hi Marc,
We are looking into this and will get back you later.

Add on question, do all of the "input formats" shown for the SAP register require MCLK?

There is a mention of connecting MCLK and SCLK together, which format would this

be allowed in?   Finally, in the SAP format bits, it isn't really clear which of those are for

the TDM8 mode or what.  Only appears to be one I2S mode, then a DSP mode.

Thnx,

MY

Hi Marc,

As per I2S spec, the supported FS is 44.1 kHz and this device can operate at 44.1 kHz. 44.2kHz is not supported. SCLK must be FS * 64 = 2.8224 MHz and MCLK can either be FS *128 or FS * 256.

You also ask about running SCLK= MCLK. In the TDM format you can run SCLK=MCLK.
Hope this helps.

Best,
Tuan

Ok, then it's pretty much gotta be as per spec. I will probably use a crystal osc. for the MCLK then since it's pretty high freq. for the CPU to generate.
Not a big deal I had not totally understood the pins on the part as well as how tight the timing would be. Another 80 cent crystal won't hurt my BOM
costs on the project, I just want it to work. So MCLK needs to be S*256 and not in any phase sync. with the other signals as I understand it.
MY

So in going back over this I have the 11.2896 Mhz crystal on the MCLK now.

I am driving the 44.1Khz FSYNC. using a USART in the CPU which also derives the SCLK signal and SDIN.
The data sheet states 40ns is the fastest that SCLK should be for it's cycle time, but I am seeing around 396ns for
that at the 44.1KHz sample rate. This must be ok as that is what 44.1 gives, correct?

The only abnormality I am seeing is the rise/fall times are more like 10ns rather than the 8ns stated on the sheet.
No matter what the SDIN is doing I wouldn't expect "timing errors/no clocks" on Global Fault Reg. 1, I would think
that what ever SDIN is doing when SCLK goes hi is what gets clocked in even if it is wrong. You would have an
audio glitch of course, but shouldn't product the timing error I'm getting.

I have ordered TI's eval. board for this part to play against, I suspect probing those signals should be informative
for me to be sure. Hoping of course, that board comes up and works well with it's related USB connected PC test
software program to configure and observe it running. I guess I will have to connect up SP/DIF to it to have audio
input to hear. Will it play through the USB connection from the PC?

Eval. part no. TAS6424Q1EVM

Thanks again,
Marc Y.

Hi Marc,
Does this answer your question? We will close it if you don't have more questions. Thanks!

Yes and no, in the sense that there are 3 FSYNC frequencies to be used, the device somehow determines if it is happy with the signals

and sets an internal flag for "timing correct" and thus turns on the output drivers, great.   My question is why does it reject timing when

the data pulses are being clocked in by SCLK?  It should take them at any speed +/- a percent of error and then process to make the

PWM output signals.  So with MCLK being required (not part of I2S standard) one can only guess the device is internally running some

sort of algorithm to measure and determine if the I2S signals are with in it's range or reject them?

I2C clocks in at any speed a CPU can make because it uses a SCL line for taking the SDA line, easy to drive with any CPU device.

I'm finding I2S maybe a pain in the butt to make work with CPUs with various clocking speeds to make them work correctly. 

I may have to switch to sending out a DAC port to an analog Class-D amp. as easier although that opens me up to interferience

with the short PCB board trace that would be an analog signal rather than digital to make the 200 watts of sound we need.

Any thoughts on this?

The eval. board should arrive soon and I will look at how that makes the I2S signals for the TAS6424...

I had some questions previously on that board too?

Thanks, Marc Y.

Nobody seems to be really answering my questions? 

How does this device determine if "timing" is correct and uncork the output and play sound?

It appears to be rather picky or exacting to the numbers for the three sample rates.

Marc Y.

Hi Marc,

It's Holiday in US, so our reply is delayed. Tuan will reply you as soon as geting back to office, thanks for your patience!

Hi TI,

My TAS6424Q1EVM module/board arrived Friday, however it was to late to get a download link from you guys then, so I couldn't do anything with

it over the weekend.  Please send a download link as soon as you can so I can get this up and running to make timing checks on it vs. my own design.

I submitted a request via. the link on the TAS6424Q1EVM page which says "REQUEST" for the software link.   I am not sure why you don't provide

a DVD or link in the document that comes with the board so an engineer can get it up running immediately like all your competitors do?

Regards,

Marc Yaxley

Hi Marc,
Sorry for the delay. The software is controlled due to US export requirements. I'm going to contact you via "Friend's Request on E2E" to keep your confidentiality. The software you request should be processed within 24 hr. I will follow up with the software team to make sure that you get the software once I get your information on "Friend's Request".

Thank you for your understanding.

Best,
Tuan

Hi Tuan,

Yes the email I use here is my main email for consulting.

marc@kellyplace.com

Pls. see if I can get the software going soon as my client

is hopping around asking if we are going to keep the

TAS6424 chip in the design or not.  If I can't get the timing

to work (I2S) then I might have to switch to an analog part

that takes input audio as a voltage which I can make with

my CPU 's DAC pretty easily.  I just didn't want to have any

analog in the design due to possible noise interference.

Thanks for the reply,

Marc Yaxley

Hi Marc,
Considering that you are conmmunicating with Tuan offline, could you please help to close this question in E2E? Thank you!
Best regards,
Shawn Zheng

Hi Tuan,
I have the two EVM kids (6424 and 6422) and both right now do not appear as USB devices, PP3 can't see them as it does not offer the
red "CONNECT" button on the bottom left of the app. display screen. I tried a Linux computer as it usually shows USB devices with
the LSUSB command, nothing shows up (even if I know PP3 is a Windows program). I will try another Windows 7 computer too just
to be sure. What can I check on as to why the boards do not show up as a usb device? I applied SP/DIF at 48KHz sample rate and the
SP/DIF-LOCK LED comes on so that is good and I can see the I2S signals from the ASIC chip to the 6424, so it's ready to go. I just can't
control the boards via. the USB/I2C using PP3 program as of yet?

Any help or suggestions would be appreciated,
Marc Yaxley

Hmm, I don't have an email for Tuan, I have only been able to communicate via. this forum, would rather use email of course?

Hi Marc,

I sent an email to this address: marc@kelleyplace.com on 4/3.  Did you receive this email from me?

Thanks,

Tuan

Hi Marc,
The USB connect uses the Windows OS USB audio driver and USB HID driver. The PPC3 does not run on Linux, only on Windows OS. Windows 7 will work.

Best, Tuan