Other Parts Discussed in Thread: ADS5409
Hi,
We plan to use the clock gen CDCE62002 for generation of 900MHz (LVPECL) for the 900MSPS ADC ADS5409, along with a 100MHz LVDS clock output. Please help with some design queries as below:
1) ADS5409 lists input clock amplitude as 2Vp-p typical, while the CDCE62002 LVPECL differential out is shown as max 870 mV. Shall the ADS5409 input be driven with sufficient swing in this case?
2) We use LVPECL output of CDCE with each line terminated to GND through 150 Ohm res, followed by AC coupled capacitor connections to ADS5409 Clock input. Please confirm if ok.
3) Only primary reference of CDCE shall be used, having options of feeding a 100 MHz LVDS input OR a 25MHz LVCMOS TCXO input.
Regards
Gaurav