LMK04821: Setup and Hold Requirements for the SYNC/SYSREF_REQ pin.

Philip Swan

Part Number: LMK04821

In addition to syncing parts, I would like to send some configuration information on a SYSREF clock by controlling it with the SYNC/SYSREF_REQ pin using an FPGA GPIO pin (see "9.3.2.2.3 SYSREF Request" in the datasheet). I plan to set SYSREF_PULSE_CNT to zero, so that it will generate just one pulse per SYNC/SYSREF_REQ event. I plan to set SYNC_1SHOT_EN to make it level sensitive. I need to know setup and hold time requirements for the SYNC/SYSREF_REQ pin to make this strategy work, but that information does not appear to be in the datasheet. Is it possible to do what I want to do here? What additional information do I need to make it work?

over 5 years ago

0 Alan O over 5 years ago

TI__Mastermind 32575 points

I am not sure if this data exists. I'm checking with someone who is more knowledgeable with this device. Thank you for your patience.

Alan

0 Philip Swan over 5 years ago in reply to Alan O

Prodigy 40 points

Please ask them to refer to the following text in the datasheet as well, "Table 1. Some Possible SYNC Configurations ... Allows precise SYNC for n-bit frame training patterns for non-JESD converters such as LM97600."
I'd appreciate a quick call to discuss if that can be arranged. Communicating by forum is too slow.

0 Timothy T over 5 years ago in reply to Philip Swan

TI__Mastermind 28530 points

Hello Philip,

You would like to send a single JESD204B pulse by asserting the SYNC pin. For JESD204B synchronization purposes. You can simply assert the SYNC pin, and the SYSREF will be sent out on a period of the SYSREF clock, without concern for any specific setup and hold times.

Will you be using more than one LMK04821? If so do you require the multiple LMK04821s to send the pulse at the same moment?

73,
Timothy

0 Philip Swan over 5 years ago in reply to Timothy T

Prodigy 40 points

Hi Timothy,

Could you read my request more carefully? Your answer addressed a problem that I'm not trying to solve. Once again, I would appreciate a call or please feel free to schedule a meeting.

Phil

0 Philip Swan over 5 years ago in reply to Timothy T

Prodigy 40 points

The problem was incorrectly restated.

0 Timothy T over 5 years ago in reply to Philip Swan

TI__Mastermind 28530 points

Hello Phil,

For setup and hold to the SYSREF_REQ, due to the sampled nature of the pin, I recommend asserting SYNC/SYSREF pin for two cycles of the SYSREF clock frequency.

I'm not sure a call would help? If would like to inquire more in regard to a call, please email clock_support@ti.com

73,
Timothy

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LMK04821: Setup and Hold Requirements for the SYNC/SYSREF_REQ pin.