Other Parts Discussed in Thread: LMX2594
Hi,
I’m using the LMX2572 for a fast stepped frequency synthesizer from 800 to 6000 MHz with 20 MHz steps. The desired lock time is < 20us in full assist mode. As simulated with PLLatinium the analog lock time should be < 15us (3. order loop filter, bw=200kHz, margin=40°, gamma=1.48).
As measured, the lock time is < 20us on the most frequencies but on certain frequencies > 50us. The screen shots show the phase error at 5160, 5180, and 5200 MHz (SPI_CLK=green, PhaseError=Yellow). The lock time at 5160 and 5200 is ok but 5180 is too long.
Full assist register values used by this test (frequency, vco_sel, vco_capctrl, vco_daciset)
5160 MHz, 4, 24, b4
5180 MHz, 4, 21, b4
5200 MHz, 4, 1d, ae
How to optimize the lock time for all frequencies?
Regards Samuel