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LMX2492EVM: LMX2492 and Code Loader

Part Number: LMX2492EVM
Other Parts Discussed in Thread: LMX2492, , LM6211

Hi,

I am using LMX2492 for synthesis of 9 to 10.4 GHz frequency.

 I have my customised board with LMX2492EVM as a reference for schematic and layout. VCO used is HMC1162. XO used is CWX813 (same as TI LMX2492EVM).

I am using the active loop filter as my VCO needs more than 5 volts for targeted frequency. Loop filter uses LM6211  opamp (same as TI LMX2492EVM).

Register values are derived from the TICS Pro default configuration mode. All the reserved registers are written as 0.

I am using my own controller to write the PLL registers using MicroWire Interface.

Nothing at all is happening at CPout pin.

I have made following observations:

1. Register writing is Ok. I can enable and disable the PLL using POWERDOWN bit. Also reading the registers gives me appropriate readings (Lets say a reserved register cant be changed. So it is being read as its POR vale).

2. XO outout to REFin pin is ok. The 100 MHz (2.4 V to 0.8 V) wave can be seen using MSO in PLL REFin pin.

3. No activity at CPOUT pin (Whereas other PLL(ADF4159) shows some activity using MSO at CPOUT for same hardware). Loop filter goes to 12 V output as CPOUT(-IN) goes to 0 and +IN at 2.5 V.

4. Tried changing bits like CPPOL, PFD_DLY, DLD_PASS_CNT, DLD_TOL, DLD_ERR_CNT  and Change Pump Gain to various values, but no effect observed.

I have 2 doubts about LMX2492 IC

1. What if my feedback is faulty and not going properly to PLL? My VCO output is 2 dBm and radiation level is so high that I get -20d Bm,10.4 GHz signal everywhere near PLL VCO Loop. I don't know how to check the feedback.

2. Can my PLL IC has a problem such that its digital section is working but RF section is not working?

Please help !!

  • One more thing
    Two register values R39 = 0x3A and R35 = 0x41 has to be there for readback on MUXOUT.
    When I write the registers from 0 to 141, its readback is ok.
    When I write them from 141 to 0, readback is deactivated.
    Deafult config does not use these settings.
    Can writing the registers in reverse order be the problem?
  • Hi Sunil,

    When you use active filter, assuming you are using the same circuit as the EVM, then you have to set CPPOL=1 because the filter is in an inverting architecture. I expect, if you see zero volt at CPout when CPPOL=0, then you should see voltage when you set CPPOL=1. However, if you still see zero volt with CPPOL=1, then there must be something wrong with your circuity or register setting.
    Now try set MUXout_MUX=16 (R/2 output), if you can see a fpd/2 signal at the MUXout pin, that means the 100MHz reference clock is able to pass through to the phase detector.
    Now try set MUXout_MUX=18 (N/2 output), again if you can see a fpd/2 signal, then the VCO feedback path is also normal.
    You can also try using a passive filter first, you should be able to lock the VCO to 9.3GHz with CPout= approx. 4V.
  • Sunil,

    One more thing. In general, do NOT write 0's to reserved registers unless the datasheet says so. These reserved registers control test functions and can impact performance. In other words, the power on reset values for registers that are not disclosed are not always 0.

    Regards,
    Dean
  • Hi Noel,

    1. I tried changing CPPOL = 0 and CPPOL = 1, But CPout always shows the constant DC voltage of 1.5 V. I think thats coming from the feedback of loop filter opamp. As non-inverting PIN is at 2.5V(same as in LMX2492EVM), opamp goes to 12V output.
    2. I also set MUXout_MUX = 16 and 18 by writing register R39 = 0x002782 and 0x002792 respectively. That means MUXout_PIN was at Pullup/Pulldown output setting. But MUXout Pin was always showing 3.3 V.
    3. I did not try to use passive loop filter as MUXout Pin was not showing anything. I think R divider output should atleast be visible if PLL is working.

    I feel my PLL IC has some problem. But then digital section works properly, so I am confused.
  • Hi Dean,

    It is clearly mentioned in the datasheet that "Registers NOT shown in this table(Register Map) or
    marked as reserved can be written as all 0's unless otherwise stated."

    One thing I changed about register programming is that I programmed them in recommended sequence i.e. R141 TO R0.
    But it has no effect on performance.

    Regards
    Sunil
  • Sunil,

    OK, I stand corrected. In general, you can not assume this, but in the case of the LMX2492, indeed the power on reset value is 0 and listed in the table, so that's not the issue.

    I don't think the order has much impact. Except if you do a softare reset SWRST, then of course you want to program registers after this.

    As for your voltage being 1.5 V constant, is this possibly an issue with the op-amp and not the PLL? I know on some older boards, we had a bill of materials error that I think we corrected, but I have seen this symptom before related to the op-amp. 1.5V sounds like the bias voltage used for the op-amp; it might be good to verify nothing wrong with this with the schematic. Toggling the phase detector polarity should have made this voltage jump.

    Regards,
    Dean