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LMK05028: Output 10MHz on all outputs.

Part Number: LMK05028

Hi,

in front of me i have the LMK05028EVM with a 10MHz signal source connected to In1. (LVCMOS 10MHz -> IN1_P; GND -> IN1_N)
In TICSPro i have configured the Chip to output 10MHz everwhere (out 0 to out 7 with default signal routing). 

1) The signal to IN1 is recognized (and chosen -> "REF1VALSTAT" ok)
2) Out0 - Out3 (from PLL2) follow the 10MHz from In1 in phase and frequency which is expected.. (Those outputs come from PLL2)
3) Out4 - Out7 (from PLL1) output "something" close to 10MHz, but it is not in sync with In1.

This is tested by comparing the input with the output on an oscilloscope.
If I trigger on the input and another channel is displaying the output, i expect no waveform movement at the output.
This is true for PLL2 but not for PLL1 despite both showing a frequency lock.

In fact PLL1 only complains about "loss of phase lock", but not "loss of frequency lock" despite the frequency is clearly off, so it cant have a lock to anything. The chip lies.
PLL1 is also not locked to the on-board 10Hz ref clock, since the frequency is pretty close to the provided 10MHz at In1.

Can please someone give me a stored configuration that simply outputs 10MHz (generated by PLL1 and PLL2) on all outputs that is derived from a 10MHz input clock?
I think this should be a fairly simple task - for me this is just a test run if i can get the basics configured, but i clearly cant.

I am not sure how i am supposed to attach a file here - i would like to share my configuration myself.