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LMK05318EVM: Need help configuring for 10Hz and 1Hz reference inputs

Part Number: LMK05318EVM

Hi,

My customer needs help configuring the LMK05318EVM for 1Hz and 10Hz reference inputs per his email below:

"The problem I have is that it seems the XO on board cannot lock to external reference (1Hz or 10MHz).

I am interested in the configuration as follows:

XO:                                         10MHz

Primary External reference:        1Hz

Secondary External reference: 10MHz

Outputs: 10MHz, 1Hz"

Thanks,

Kevin

  • Hi Kevin,

    Given that the primary and secondary references are wide apart, the same device config won't work for locking to either. To lock to either inputs, have you tried to generate device config using the TICS Pro GUI in the "Start Page" for the LMK05318? Please contact at my email if you need further assistance on generating the config using the GUI.  

  • excuese me,I am a student from China and meet some problem in using lmk05318evm ,i can't find your email,could you tell me your email...
  • Hi Zhao,

    I see you have created a new post on this issue, I am closing this thread.
  • thanks for your reply.
    I think the start of lmk05318 should follow the pll intialization sequence but I meet problem in the first and second steps,VCO calibration and aplls locked(free run from xo)
    I used the plate-crystal calibration as the main clock, and both the formula and the central frequency of vco1 met the requirements of entering freerun mode. However, when the state of the led light was adjusted to pll1 vco calibration active, it did not light up. Even if manually restart by pll1powerdown, the led light representing pll1 vco calibration active only flicker once.However, when I cascade apll2 xo, the light from the pll2 vco calibration active is turned on, and when I cascade apll2 to apll1, the light from the pll2 vco calibration active is also turned off,so I suspect the apll1 of my evm has problem.
    In addition, after I connected the reference and use apll1 cascade with dpll. When the led light indication was the default, the DPLL lock requirement could be met,(the light of dpll loss of locked is not high,and dpll holdover is not high)but when the led light was turned back to indicate pll1 vco calibration active and pll1 lock detected (lol*), which were not on.And the output waveform is not in phase with my reference waveform.So now I really doubt that there is something wrong with the hardware of the development board. Can you help me?Thanks a lot.
  • Hi Zhao,

    I encourage you to create your own post instead of continuing other people's old posts, especially when these posts are already closed. Thank you for your cooperation.