LMK03318: How long after PDN L -> H to wait before I2C transactions are allowed and valid?

Jonathan Bender

Part Number: LMK03318

Hello,

What is the worst case delay I need to build into my system between the LMK03318 being brought out of reset via PDN and the first communication on the I2C bus?

I'm using LMK03318 in soft pin mode, and I can usually communicate with the device via I2C 100 ms after the PDN pin is brought high. But sometimes, it seems like it needs more time.

Thanks,

Jonathan

over 4 years ago

0 Lane Boyd over 4 years ago

TI__Genius 16845 points

Hi Jonathan,

I do not have an exact period of time. Please be aware that the first I2C transaction after the PDN transition should be ignored (see the note under datasheet figure 71) I've linked some relevant threads below which address a similar issue, here it was recommended to issue a dummy read. Depending on your I2C speed, the dummy read may take more than 100ms.

https://e2e.ti.com/support/clock-and-timing/f/48/t/658035?LMK03328-I2C-access-and-PDN

https://e2e.ti.com/support/clock-and-timing/f/48/t/658827?LMK03328-Operation-of-PDN-pin-and-I2C

Kind regards,
Lane

0 Jonathan Bender over 4 years ago in reply to Lane Boyd

TI__Expert 7895 points

Hi Lane,

Thanks for the reply. I'm verifying with software to see if this observed 100 ms includes the dummy read.

If the lack of a dummy read was the issue, I'll go ahead and close this thread. If not, I'll come back with more info.

Thanks,

Jonathan

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LMK03318: How long after PDN L -> H to wait before I2C transactions are allowed and valid?