• State TI Thinks Resolved
  • Locked Locked
  • Replies 6 replies
  • Answers 2 answers
  • Subscribers 20 subscribers
  • Views 422 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMK03318: About Reference input detcion

YoungYun Kim
Intellectual 410 points
Part Number: LMK03318

To a persion concerned.

I had problem for Clock Ouput generation on LMK03318. So, I read relevant register description and found one questionable thing.

Regarding Reference Clock detection, As far as I understand, User should  use R29, R25, R18.

My setting for the detection is as below

-. DETECT_BYP = 0 on R29.7

- DETECT_MODE_SEC on R25.7:6 = 00 or 01 , 10, 11

- LVL_SEL_SEC on R25. 3:2 = 00, 01 ,10

With the combination of the above values, I expected Reference clock input should be detected and R18 showed result. But R18 had always 0x00.

0x00 means that Slew Rate Detect status was invalid.

Could you let me know which case Slew Rate Detect is valid at?

thank you

Best Regards

Mark Ki

  • 0
    TI__Mastermind 18070 points

    Hi Mark,

    Input detection can fail due to many reasons. To quickly debug this, please provide your input waveform (sigle ended or differential?) as well as .tcs configuration. It may be due to a simple register setting and it may also due to input waveform distortion. You can skip the waveform part and only provide .tcs file if you use XTAL.

    To save a .tcs file, go to Ticspro -> File -> Save. You may zip the .tcs file if you fail to upload it.

    Regards,

    Hao

  • 0 in reply to Hao Z
    Intellectual 410 points

    Hi Hao

    I attache files you asked. 2019-0826.zip

    thank you

    Best Regards

    Mark Kim

  • 0 in reply to YoungYun Kim
    Intellectual 410 points

    Hi Hao

    any update for the attache file. Could you please let me know whether  Rate Detect status bits should be set for proper operation?

    Even though they had 0 ( invalid) value, ch0~7 clock outputs were obseved.

    thank you

    Best Regards

    Mark Kim

  • 0 in reply to YoungYun Kim
    TI__Mastermind 18070 points

    Hi Mark,

    If the PLL is not locked then the output frequency is probably not accurate. I had a look at your frequency plan and got confused. Is your input frequency 156.25MHz or 50MHz? Because on "Inputs/PLLs" page, it says 156.25MHz, but on "PLL1" page, it says 50MHz. Please use the "Wizard" to do frequency planning. This can be found in the latest Ticspro:

  • 0 in reply to Hao Z
    Intellectual 410 points

    Hi Hao

    Customer has used 156.28MHz clock input on only secondary reference input, In case of 50MHz, I think you selected wrong part number.

    Customer has used LMK03318

  • 0 in reply to YoungYun Kim
    TI__Mastermind 18070 points

    Hi Mark,

    My bad. R18 is indicates slew rate detection and it's meant for single ended input. If you read description of R25, you'll see that for single ended input, there's VIH/VIL detection and slew rate detection. But for diff signal, there is only level detection because diff input is AC coupled. In other words, if you change input to single ended and choose slew rate detection, then you'll see R18[7:6} reads back 0x11 for secondary input.

    Now, in order to know the status of loss of SECREF with diff input, use the two status pins (pin 1 and pin 2). For example, set status0 as below:

    Now you should be able to see a low at pin 1 if there is no loss of SECREF.

    One more thing, the input termination is incorrect. Don't turn on 50Ohm to ground and 100Ohm diff in the same time. Refer to the datasheet of your input oscillator to determine the input termination of LMK03318.

    Regards,

    Hao