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Part Number: LMK00301
hi dear supporting team,
how about the output drive capability of LMK00301 for LVPECL and LVDS output mode? how big cap load allowed @ 100M? and how about the output current ability? tks a lot!
LVDS lists the short circuit current for single ended as +/- 24 mA and differential as +/-12 mA. A cap may consume the full current at start-up.
For LVPECL, on falling edge the current will sink out through the emitter resistor, so smaller emitter resistor = higher current. As for rising edge the current will be source directly from LMK00301 with low impedance path to Vcc. It can momentarily source much more than LVDS, as much as 100 mA or more.
Can you advise what sort of capacitive load you are considering?
More information Clock and Timing System products: http://www.ti.com/clock-and-timing/overview.html
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In reply to Timothy T:
thanks a lot! customer is using it drive AFE ref input and FPGA , the cap load should be below 10pF. they will use model to do the simulation. tks a lot!
In reply to Vera Mao:
I expect no issue with 10 pF.
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