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LMK00308: Clock Input switching generates spikes

Prodigy 40 points

Replies: 6

Views: 153

Part Number: LMK00308

Hello,

At the Clock Inputs there is a slow Clock Signal (<10MHz). Switching from one to the other Input is done when both Clock Signals are "low".

Then, switching from CLKin0 to CLKin1 and back generates an short (10ns ... 20ns) "high-pulse" at the Outputs. 

Is this a known behavior? We can reproduce this bahavior with an LMK00308EVAL board.

I could not find any informations in the datasheet concerning the timing behavior of the switching function. 

Propagation Delay? Glitchfree? Drift? Time until Output Signal is valid...

6 Replies

  • Hi Stefan,

    all the differential buffers are asynchronous to the input, the output will not mute during input switching. Maybe this is the reason we have a small glitch. 

    The AC timing spec is in page 13 of revision D datasheet. LVCMOS enable to valid time is in page 12.

  • In reply to Noel Fung:

    Hi Noel,

    thank you for this answer.

    Unfortunately this is not a solution for our problem we have with this TI chip.

    The AC Timing spec does not contain the information we need to have! I already read the datasheet.

    The Information we need is:

    CLKin_SEL to CLKout valid


    We did some measurements, and got shocking results.

    At a board we designed on our own, we got this glitch after about 7ns after changing the select-pin. The time the output stays invalid is about 5ns.

    At another board (the TI Eval Board LMK00308EVM), we measure an invalid signal after 3ns. This invalid state remain for about 20ns.

    So we have no valid signal after input-selection for about 25ns!

    This is quite a long time for a 3GHz Clock Distribution... :-(

    Unfortunateley we have no statistical experience fot this value and no worst-case consideration.

    This is what i expect to get from TI!

  • In reply to Stefan Gilg:

    Hello Stefan,

    This device is not intended for switching on the inputs on the fly as there is no synchronization or gating of the outputs. There will also be some delay due to the power up time for the input buffer when switching over and the internal biasing.

    For glitchless switching of the input reference sources, an alternative device may be the LMK05318 as when this is run in DPLL mode it can provide seamless transitions between reference inputs.

    Regards,

    Liam

    Liam Keese

    Clock and Timing Systems & Applications


    To view training videos on Clock and Timing Solutions please visit  TI Precision Labs ​​​​

    More information Clock and Timing System products: http://www.ti.com/clock-and-timing/overview.html

  • In reply to Liam Keese:

    Hello Liam,

     

    The LMK05318 is no option for this application.

    We do not have a real clock signal. We have a marker-signal with a changing duty cycle. And we have to switch over always at the off-time oft this kind of PWM signal. The big thing is not, that there is a glitch, but that there is no specification!

     

    So, can anyone specify this "some delay"?

     

    I'm not happy with an device that have some delay here and some delay there, any behavior here and any undefined behavior there...

    The datasheet does not tell me that the switching over takes some time, it does not tell me that the device can only handle clock signals, the datasheet does not tell me about internal biasing delays of the inputs...

    Maybe we should use TI-datasheets only as a guideline, not as a specification sheet... :-(

    Unfortunately it is not possible to measure worst-case values to guarantee the function and robustness of our electronics.

    I think this is the responsibility of the vendor. 

    Regards,

    Stefan

  • In reply to Stefan Gilg:

    Hello Stefan,

    Previously I mentioned, this buffer was not intended for the system use case you are describing. There is no synchronization for switching between inputs on this buffer to the MultiMode Outputs (Bank A or Bank B). We do not have any recommendation or suggestion in the datasheet that the input buffer can be switched real time nor was the device characterized for this use case. There is no synchronization other than the REFoutEN pin feature. 

    As such we do not plan to specify or guarantee this type of operation, . I realize this is not the answer you would prefer.

    The information I provided you was only to provide some insight into what is happening internally, not to provide some guarantee or specification. If you switch between input buffers, any qualification would need to be on the system level.

    Regards,

    Liam Keese

    Clock and Timing Systems & Applications


    To view training videos on Clock and Timing Solutions please visit  TI Precision Labs ​​​​

    More information Clock and Timing System products: http://www.ti.com/clock-and-timing/overview.html

  • In reply to Liam Keese:

    Hello,

    indeed this is a dissapointing answer.

    Therefore i will close this post at the "E2E support forum" and will contact our FAE and Key Account Manager.

    Regards,

    Stefan

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