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LMK00804B-Q1: Transferring data using a clock buffer

Prodigy 230 points

Replies: 3

Views: 75

Part Number: LMK00804B-Q1


I asked the following question in Interface devices forum. Could you give an advice about the 3-rd point?

(Is it a good idea to use a clock buffer to transfer data, because I need to drive a 50 ohm load?):

" My goal is to to translate 2.5V logic level (from MAX10 FPGA) to 1.8V logic, driving a 50ohm load.

It means that I need a device capable of driving 1.8V/50ohm=36mA.

I didn't find any device capable to drive such current, so my question is:

1. Can you recommend about a device like this?

2. do you recommend using few devices (or one dual/quad..) by connected inputs and outputs in parallel, to increase drive capability? (As mentioned in https://e2e.ti.com/support/logic/f/151/t/437301?Suggested-Logic-Buffer-for-driving-TTL-50-ohm-load)

3. Is it possible to use a Clock buffer (like LMK00804B-Q1), which seems to be capable of driving 50ohm loads? "



  • Hi Max,

    Please note, the min. VOH of LMK00804 is 1.44V at 50Ω load with 1.8V VDDO. 

    I have a couples of question to you:

    what is the data rate?

    Is the data AC-balanced?

    LMK00804-Q1 is a synchronous buffer, if the input is not a continue clock signal, I am not sure whether the output buffer can be enabled. I copied my colleague here, he may give you more advice.

  • In reply to Noel Fung:

    Hi Noel,

    The data is not AC balances, it's supposed to transfer an arbitrary data, so a seres capacitor can block some of it.

    The data rate is no more than 100Mbps (50MHz).

    The specific device is not a must, the question is if a clock buffer can be used to transfer data.


  • In reply to Max Pom:

    Hi Max,

    If both input and output can be DC-coupled, then yes, a clock buffer can buffer data.