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LMK01801: CLKout12/12* connected to CLKin0/0*

weidong chen
Prodigy 10 points
Part Number: LMK01801
Hi Ti Team,
Question1: Is it ok to use LMK01801 to get a maximum clock divider ratio of 8*1045*8=66880 by connecting CLKout12/12* to CLKin0/0*? Any concern or potential risk with this approach?
Question 2: If the above approach is ok, can I have a 2:1 mux before the input (CLKin1/1*) of LK01801 to transmit either clock signal or data signal? In case of clock input,  the divider ratio is from 1 to 66880. In case of data input, divider ration is 1.
Looking forward to your reply.
  • 0
    TI__Mastermind 27581 points

    Weidong,

    The LMK01801 has two inputs, so I see no issue with cascading these.  I think that because it is derived from the same clock, crosstalk between banks should not be an issue.  I think that it is best this way as you have it to drive CLKin0 from CLKout12, because the smaller divider likely has better noise floor and will help divide down the noise of the bigger divider.

    You should also be able to put a mux before CLKin1.

    The only thing to be careful with all these dividers is that if the frequency gets too low, make sure that you don't violate any specs.  Also, if you have an AC coupling capacitor, make sure it is of sufficient size.

    Regards,

    Dean