LMK04803: LMK04803

Hello Andreas,

The LVCMOS output impedance isn't exact, and varies depending on DC load and AC frequency. We do provide an IBIS model for the LMK04803, which has the LVCMOS format included. I recommend using this for optimization, as it will be more accurate than any equivalent datasheet number I could give you. The PCM1792A also has an IBIS model, so conceivably you could simulate the clock performance of the whole system.

I don't recommend driving multiple loads with a single clock output pin. The DC loading from input logic current isn't really an issue. Fanout of a single low-noise trace to multiple devices could lead to reflections, which affect the clock edge slew rate, clock edge monotonicity, and clock jitter. I recommend instead using some LVCMOS buffer device such as the LMK1C1104. You could take one leg of an LVCMOS clock output from LMK04803 and drive each of two LMK1C1104, and fan the buffers out to the eight separate devices. 

Note that my intuitions about driving multiple loads may be miscalibrated: typical users of the LMK04803 are using the device at >100MHz for RF and wireless infrastructure applications, where LVCMOS clock reflections and skew can be a big issue for clock edge monotonicity and jitter performance. Maybe at the lower frequency required by the DACs (10-20MHz), reflections and signal integrity degradation are small enough that clock edges remain monotonic. If you want to be more certain, I recommend simulating your use case.

Regards,

Hello Derek,

thank you very much for your very professional advise.

I had a look at the MK1C1104 and will follow your advise to use these buffers to drive the eight separate devices. I'll also have a look at IBIS/Tina.

Have a great weekend

Andreas