sine to lvcmos component

Prodigy 40 points

Replies: 6

Views: 66

 

HI all.

I am looking for Sine (10mhz) Clockt o Fan-Out Buffer 3.3V lvcmos/TTL

In the pass I used the CDC3RL0 but the output was for 1.8V

do TI has a component for 3.3V ?

I'll  appreciate help.

6 Replies

  • Hi Yoni,

    It looks like this question is directly related more with low phase-noise clock buffers than with standard logic products - I will redirect the question to the clocking group internally.

    In the meantime, can you provide details for the application?

    For the input signal, peak to peak voltage and DC offset would be helpful to know.

    For the output signal, loading, number of outputs, and jitter/skew requirements would be helpful.


    Looking for a low voltage translator? Check out the AXC family that supports 0.7V to 3.3V translation!

    The Logic Minute training page has videos on many interesting topics that all are kept shorter than 5 minutes.

  • In reply to Emrys Maier:

    Hi

    thank for the quick answer.

    In the meantime, can you provide details for the application?  I have a stable clock that I need to SQR for my FGPA

    For the input signal, peak to peak voltage and DC offset would be helpful to know: classic sine , no dc offset (0v crossing) ,2-6dbm

    For the output signal, loading, number of outputs, and jitter/skew requirements would be helpful.load:50ohm/1koham,1/2 outputs, low phase noise

  • Genius 10640 points

    In reply to yoni zlotnick:

    Hi,

    My coworker will get back to you by tomorrow.

    Regards,
    Hao

    Clock and Timing Systems & Applications

    To view training videos on Clock and Timing Solutions please visit  TI Precision Labs ​​​​

    More information Clock and Timing System products: http://www.ti.com/clock-and-timing/overview.html

  • Hi Yoni,

                I will be glad to help you but before i can provide you a relevant answer, i had a couple of questions:

    1) Is the input signal Sine Wave @ 10 Mega Hertz and also whether it is differential or single-ended?

    2) If single-ended, and based on your previous reply, where you mention that it has no DC offset, this would imply it is swinging below the ground? We don't have parts which have negative supply  support; so therefore we will have to use a dc biasing scheme to make it compatible for interfacing with our part.

    Regards,

    Badarish,

    Clock and Timing solutions,

    Texas Instruments Incorporated

  • In reply to Badarish:

    Hi

    thank for the quick replay

    1) Is the input signal Sine Wave @ 10 Mega Hertz and also whether it is differential or single-ended? single ended

    2) If single-ended, and based on your previous reply, where you mention that it has no DC offset, this would imply it is swinging below the ground? We don't have parts which have negative supply  support; so therefore we will have to use a dc biasing scheme to make it compatible for interfacing with our part.- I can rise the sin. signal above 0v if needed, the imported thing is the 3.3v lvcmos output level when the input level is 2-6dbm

  • In reply to yoni zlotnick:

    Hi Yoni,

                 I am afraid we don't have any LVCMOS only part which can take a sine wave input and give a 3.3V output. I do believe that our LMK00334 should be able to handle your requirements based on the datasheet specifications. I do however want to note that the jitter and phase noise performance would be much worse because of the very low slew rate associated with the 10 MHz sine input. Also just have to make sure that the voltage swing is more than the minimum value mentioned here of 0.3 V.

    Let me know if you have any more concerns.

      

    Regards,

    Badarish,

    Clock and Timing solutions,

    Texas Instruments Incorporated