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LMX2594: Phase Noise and Fout stability

Astrome Tech
Intellectual 370 points
Part Number: LMX2594

We have designed a transceiver system in which the LO is being generated by LMX2594 at 12.5 GHz output. I have used PLLatinum Simulation Tool to design the loop filter. The filter was originally designed for 20.833 MHz Fosc. The input reference clock is provided by Analog Device's HMC7044. Our design requirement limits the Fosc to integral multiples of 2.604 MHz up to 100 MHz like 10.433 MHz, 20.833 MHz, 41.667 MHz etc. The schematic is attached below-

 

However, in the actual hardware the performance is not as good as expected. There are 2 types of spurious: 1) around 3kHz offset from carrier and 2) around 150 kHz offset from carrier. The tradeoff in performance is as follows-

1. Lowering Fosc  to 2.604 MHz improves 150 kHz offset spurious but deteriorates 3 kHz offset spurious

2. Increasing Fosc to 41.667 improves 3 kHz offset spurious but deteriorates 150 kHz offset spurious.

Below is the 150 kHz spurious I am referring to with Fosc=20.833 MHz and OSC_2X enabled ( the frequency has been downconverted by our Rx to suit the spectrum analyser range)-

1. Could you suggest ways to improve the Fout Phase Noise and performance like better filter and schematic design or any other settings in the LMX2594 configuration?

2. How effective is OSC_2X doubler before Fpd and charge pump current to improve PN?

3. The Fout is also seen to drift away from its initial locking frequency with time. What can be the cause and how to improve this?

Thanks

Samarth

  • 0
    TI__Mastermind 27581 points

    Samarath,

    In general, I think that you are better using higher input frequency.  This gives higher input slew rate that is good for spurs.  This is why the 3 kHz spur improves.  As for the 150 kHz spur getting worse, perhaps are you not keeping the phase detector frequency constant?  If the phase detector frequency is lowered, then the loop bandwidth is lower and this will improve spurs outside the loop bandwidth, but degrade the jitter.  Also, you might try increasing C15 and C17 to 1 uF and see if that has any improvement for spurs.

    The OSC_2X doubler is helpful.  Although it may add 1 dB noise, you get a 3 dB benefit from the higher phase detector frequency, so this is a net gain.

    The PLL tracks the input reference and it does not wander.  So most likely, if you see the output frequency drifting, it is likely the input reference that is drifting and the PLL is just tracking that.


    Regards,

    Dean

  • 0
    TI__Guru* 81580 points

    Hi Astrome,

    Since Fosc is adjustable, I assume you were taking PLL2 output from HMC as the reference clock to LMX2594. This is not a good idea as PLL2 will add noise to the LMX unless your LMX loop filter bandwidth is small. We recommend use PLL1 output as LMX reference clock.

    Regarding the spurs, I think you can try using an external clean clock source as the LMX reference clock, see if the spurs is gone.

    Your output is 12.5GHz, a low frequency reference clock to LMX is also not ideal. The N-divider will be very big and therefore PLL noise is not going to be good. 

    OSC_2X can bring the fpd up without adding noise, it is a proven solution to deal with low Fosc.

    If you see frequency drift from LMX, either it is unlock or the reference clock is drifting. If the drift is gentle, most likely PLL1 of HMC is unlock.