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LMK03328: Schematic review

Part Number: LMK03328

Dear colleague,

Below is the customer clock configuration, I could generate it in TICS Pro.

But I want to confirm again, OUT0/1 is 48.35M,OUT2/3 is 148.5M,OUT7 is 27M.

Thanks a lot!

Best Regards,

Rock Su

  • Hi Rock,

    My comments below:

    1. 148.35MHz and 148.5MHz should be physically separated in order to avoid crosstallk. Therefore, I'd place the 148.5MHz on OUT4 and OUT5.

    2. Leave a placeholder for a capacitor to ground on the PDN pin. No need to install the cap, but just in case you need to slow down the PDN ramping at some point.

    3. There's internal XTAL load capacitance in LMK03328, so after the board is fabricated, you might need to tune those caps in order to get the right ppm accuracy.

    4. GPIO0 needs to be pulled high. Otherwise all the outputs will be muted.

    5. GPIO4 should be tied to ground if frequency margining is not needed. Read through datasheet page 41 for more details.

    6. Make sure that all the outputs are AC coupled and terminated with 50Ohm to ground.

    Regards,
    Hao