LMH1983: LMH1983 behaves when it is set into (1) 00, Always drift lock, (2) 01, Drift Lock if (3) 1x, Always Crash Lock

Amin-san,

Thank you for your feedback.

The description of the datasheet is still strange to me

Can you make it cleared my question bellow?

The datasheet stats as bellow on page 28.

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

0x11 Alignment Control – TOF1 3:2  TOF1_Sync

01 = Drift Lock if output < (2LOA_window x 27 MHz Clock). Crash

Lock otherwise.

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

The condition “< (2LOA_window x 27 MHz Clock)” means the No loss of align.

I suspect that it should be “ TOF1 is within 2 lines of the expected location”.

Please check it with design document.

Mita

Hi Mita-San, 

I think I understand the question now. If loss of alignment is never reported then it wouldn't align (whether crash or drift), and from the given condition for drift lock it seems loss of alignment wouldn't be reported. Let me look into this and come back to you. 

Thanks and regards,

Amin 

Amin-san,

Thank you for understanding my question and am looking forward your feedback.

Mita

Amin-san,

I am looking forward get the answer.

Mita

Hello Mita-san,

Register 0x15 is only taken into consideration when register 0x11 bits [3:2] are set to 01. When this condition is met the value programmed into 0x15 determines when loss of alignment occurs. After loss of alignment is determined, and the reference clock is reapplied, the TOF1 phase determines whether the device uses drift lock or crash lock mode to relock.

Thanks,

Vibhu

Vibhu-san,

Thank you for your feedback.

Let me get back to the original my question.

How dose LMH1983 act when it is set into the following three modes.

through address 0x11 bit 3:2.

(1) 00, Always drift lock,

(2) 01, Drift Lock if

(3) 1x, Always Crash Lock

Mita

Hello Mita,

First 0x15 register is set to define what a misalignment is. "In Register 0x15, a time window is defined to specify the amount of mismatch permitted between FIN and TOF1 while still considering them to be aligned."

Here is what crash lock and drift lock do:

"Crash lock involves simply resetting the counter that keeps track of where the TOF1 output transition happens, resulting in an instantaneous shift of TOF1 to align with FIN."

"Drift lock involves using the second loop in PLL1 and skewing the VCXO to make the frequency of CLKout1 either speed up or slow down. The VCXO skewing slowly pulls TOF1 and FIN into alignment"

All the above quotes are from section "8.3.10 TOF1 Alignment" of the datasheet.

Based on what 0x11[3:2] is set to the device will fall into one of the following states:

00 = Always Drift Lock, here the outputs drift smoothly

01 = Drift lock if there is a small misalignment and crash lock if there is a large misalignment, here small vs large misalignment is defined again by the LOA_Window set in 0x15.

1X = Always Crash Lock, fast alignment at the expense of phase disturbances

Thanks,

Vibhu

Vibhu-san,

Thank you for the answers.

I understand that when bit 3:2 in address 0x11 is set

00b  Always smooth lock:

1xb Always crash lock.

However, I still have a question in 01b mode.

An old datasheet revision G, states as bellow:

From this description, I suspect that far and near criterion is less or more than two lines

rather than LOA_Window, because LOA_Window is always TRUE. 

Please check it with design document.

Hello Mita-san,

I am looking to see if I can find any history on the datasheet change. I will let you know if there are any differences from current datasheet online.

Thanks,

Vibhu

Vibhu-san,

Thank you for your feedback.

I am looking forward your answer.

Mita

Vibhu-san,

Thank you for your feedback.

I still have a question when the device is in 01b mode.

The condition “(more than 2^LOA * 27MHz Clocks)” means the Loss of Align.

There for 01 mode is implied as “Crash lock when LOA”.

It does not coincide to my test results.

Can you do an experiment as bellow:

1, Make TOF1 align to an NTSC input.

2. Set the align mode 01b

3. Remove the reference input and wait till the timing difference between

TOF1 and Refence reaches more than, say 1 us.

4. Then, apply reference video input to the device.

5. Observe the TOF1 and reference video input t with an oscilloscope.

I sow that TOF1 smoothly drift to the reference video input if direction bit is

coincide the drift direction, otherwise,TOF1 drifts away till the difference is more

than two H lines, then crash lock.

Mita

Vibhu-san

Thank you for your feedback.

I wonder if you can do an experiment.

1. Make align  TOF1 and reference video in '01b' mode

2. Remove the reference and wait till TOF1 is away from the  top of frame of the  reference video

   more than 1 us. It is far away than the LOA threshold of the default conditions. ( ~300 ns).

3. Apply the reference video and observe the TOF1 and reference video.

MIta

Hello Mita-san,

I do not have an EVM for this device and my lab access is currently restricted due to COVID. It may take 1-3 weeks to locate/order a board and try this out.

From what you have described, it seems like the device is behaving as expected.

Is there something about the behavior of the part that you are still confused about? Do you have any additional questions?

Thanks,

Vibhu

Vibhu-san,

Thank you for your action.

I will wait for about three weeks.

Shall I open this thread until you get results or close the thread and 

wait for your results through e-mail?

Mita 

Vibhu-san,

I missed you question “Is there something about the behavior of the part that you

are still confused about? Do you have any additional questions?”.

My answer is yes.

In order to make decision, which align mode is optimal for my video system, I need to

Clarify how LMH1983 behaves in each mode. I can make it cleared the behavior of the

Always Drift lock and Always Crash lock, but I can not know the precise behavior of the

Drift lock if mode.

Mita

Hello Mita,

What did you set your LOA_Window to?

You are saying that instead of 0x11[3:2] = 

a). Drift lock if we are within 2^LOA 27MHz Clocks

b). Crash Lock if we are more than 2^LOA 27MHz Clocks

You are seeing  0x11[3:2] = 

a). Drift lock if we are within 2x 27MHz Clocks

b). Crash Lock if we are more than 2x 27MHz Clocks

Is that correct?

Thanks,

Vibhu

Vibhu-san,

I used LMH1983 with default register settings except the following modifications.

1. Change Address 0x0A to 0x0E from 0x0F to enable TFO1 Output.
2. Change Address 0x1 to 0x04 from 0x34 to select Auto Align.

Align mode is kept as the default ( 01 b: Drift lock if----),

As well as the Slew Direction is kept as the default (0: Slow-to-Fast)

1. LOA window was left as the default value 010b.

I observe as bellow:

Under this circumstance, if TOF1 is advanced against Refence

video more than 2**2 of 27 MHz clocks, say mare then 10 us or

more, TOF1 slews to the Refence video.

if TOF1 is behind compered to the Reference video more

than 2**2 of 27 MHz clocks, say mare then 10 us or more, TOF1

slews away from the Refence video and crash locks to the Reference

video, when the video phase difference reaches to two H-Lines.

MIta

Hello Mita,

Thanks for confirming. I will let you know when I find out more.

-Vibhu

Hello Mita-san,

Wanted to update you here, we will be able to test this the last week of November. Sorry for the delay.

Thanks,

Vibhu

Vibhu-san,

Thank you for your interim status update.

It is okay for me to wait on of this month.

I am looking forward your results.

Mita