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LMX2595: Category 3 SYNC

Part Number: LMX2595
Other Parts Discussed in Thread: USB2ANY, LMX2594

Greetings sir,

We are making use of LMX2595 in our project for frequency application in range of 15 - 18 GHz. For phase synchronization purpose, according to figure 33 of data sheet our application falls in category 3 since we make use of fractional mode, with fOUT % fOSC != 0 (please confirm). 

When we tried to program EVM with Phase Sync option, PLL did not get locked for frequencies above 15 GHz. However, for similar settings it locks for frequencies less than 15 GHz. I have attached the GUI settings we used, for reference 6813.15.555GHz-SYNC-e2e.tcs . Please tell us the appropriate method/steps to program PLL for frequencies above 15 GHz (particularly 15805 MHz) with phase sync option for category 3 application.  

Also, we wished to confirm whether the SYNC pin in EVM needs to be externally triggered or USB2ANY board has provision for the same.

Regards,

Karan

  • Hi Karan,

    For Cat. 3 SYNC, we need a time critical SYNC pulse to trigger the sync. Watch the following short video for details.

  • Hi Noel,

    I have watched the video you attached, and I understand now that time critical sync pulse needs to be externally provided for category 3 application.

    Unit used in video is LMX2594, which according to my understanding supports programming up to 15 GHz. As stated above, with GUI settings I attached (for LMX2595), we are able to program PLL with VCO_PHASE_SYNC enabled, up to 15 GHz. However, we are facing issues with PLL not locking for frequencies above 15 GHz with VCO_PHASE_SYNC enabled.

    More specifically, EVM PLL does not lock to programmed frequencies (above 15 GHz) when we use VCO doubler along with VCO_PHASE_SYNC enabled. Is there any frequency limitation for sync application? From what I understand from video, PLL needs to lock first in order to supply the time critical sync pulse. Please correct me if I missed something.

    Regards,

    Karan 

  • Karan,

    Looking at your TICSPro file, I see that RFoutA is using the VCO doubler and RFoutB is using the channel divider.

    But RFoutB is powered down and I don't think you really want to use the channel divider.  SO the first thing I would try is set OUTB_MUX="VCO".  This eliminates the need for the IncludedDivide.  I'm not sure is this is the root of the issue, but I would suspect if it was, it would cause the VCO to go the high end.

    Regards,

    Dean

  • Hi Sir,

    I applied the change that you suggested and PLL now locks for >15 GHz. Thank you.

    Regards,

    Karan