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LMX2594: Duty cycle issue of LMX2594

Part Number: LMX2594

Hi TI expert

The LMX2594 datasheet specifies that if the input reference double is used, the duty cycle should be 50% since both rising and falling edges are used. Is there any data on how tight the duty cycle has to be for good performance? What happens if the duty cycle is something like 60/40?

Best regards,

Thomas

  • Hi Thomas,

    We don't have specific data on this, but as you have mentioned, we use both rising and falling edge of the reference clock. If the duty cycle of this clock is not close to 50%, the unbalanced clock-high and clock-low time will appear as FSK modulation. As a result, there may be spurs at the output of the synthesizer.