Other Parts Discussed in Thread: LMX2615-SP, , LMK04832
Hello,
For both the LMK04832-SP and the LMX2615-SP, can the SPI and the CSb chip select inputs be controlled using 1V8 logic?
Thank you,
Rajan.
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Hello,
For both the LMK04832-SP and the LMX2615-SP, can the SPI and the CSb chip select inputs be controlled using 1V8 logic?
Thank you,
Rajan.
Hello Rajan,
If you take a look at the "DIGITAL INPUTS" and "DIGITAL OUTPUTS" section of the "Electrical Characteristics" you will see that the LMK04832-SP will register a high when the input is above 1.2 V and a low when the input is below 0.5 V. However, the output SDIO high level is above VCC-0.4 which is well above 1.8 V. This is something to consider in your design.
Similarly, if you take a look at "DIGITAL INTERFACE" section of the "Electrical Characteristics" you will see the requirements for the LMX2615-SP.
Thanks,
Vibhu
Vibhu,
For the LMX2615-SP, I believe its SPI and CS signals are 1V8 complaint.
For the LMK04832-SP, the output SDIO is a 3V3 signal, however, its SPI input signals are 1V8 compliant.
Regards,
Rajan
Hello Rajan,
Please also pay attention to the limits, on what is registered as a high and a low. I believe these will be slightly different for both parts
The SDIO is bidirectional line.
Thanks,
Vibhu
Hello Rajan,
CMOS termination is not required but a small filter on the SPI pins to filter out high frequency EMI (from CMOS inputs) from coupling onto the output clocks might be beneficial. If SPI and clocks will not be running simultaneously then this isn't needed.
Additionally, more information on the 1.8 V logic. The LMK04832 can be configured for SDIO output to be open-drain, this way you can use a pull-up to 1.8 V. Please refer to register 0x149[6] for this configuration. The LMX2615-SP however does not have this control for the output MUXout pin.
Thanks,
Vibhu
hello,
I think there are mistakes in the LM2615 datasheet:
1. VIH is specified as 1.6 V max, surely this should be min
2. VIL is specified as 0.4 V min, surely this should be max
3. datasheet implies 1V8 logic can be used for SCLK and SDI, however VOH = Vcc-0.6
please advise
thank you,
Rajan
1. TI guarantees that all devices will read the input as high when the voltage is at least 1.6 V. This means that for all devices, the switching threshold will be below 1.6 V. There are manufacturing variations and changes due to temperature, so sometimes, the threshold will be near 1.6 V, and more often, the threshold will be much lower. When you are designing for the worst case, you have to look at the case where the threshold happens to be rather high. In other words, the datasheet specifies how high the threshold could be, i.e., the maximum possible VIH value.
From the point of view of the device, the VIH value is the maximum, i.e., the device ensures that the actual VIH is at most that high.
From the point of view of the circuit designer, the VIH value is the minimum, i.e., the input signals must be at least that high.
The datasheet specifies this value from the device's point of view.
3. Many 1.8 V logic devices, such as those in the AUC family, have overvoltage-tolerant inputs.