LMX2595: Spurious at 50KHz offset

Part Number: LMX2595


I am using the LMX2595 to generate the output frequency within the range of 1.3GHz to 2.4GHz. But observed spurious at 50KHz offset I tried for 1.4GHz and 2GHz output frequency also changed the power supply and checked same spurious are present. The measured results and schematic is attached. Please suggest how to remove this spurious.



  • Hi Sushant,

    Could you provide your PLL configuration in TICS Pro format?

  • As requested please find the attached TICS pro setup image and register values.

    HexRegisterValues(S ref100MHZ-Input1400MHZ).txt
    R112	0x700000
    R111	0x6F0000
    R110	0x6E0000
    R109	0x6D0000
    R108	0x6C0000
    R107	0x6B0000
    R106	0x6A0000
    R105	0x690021
    R104	0x680000
    R103	0x670000
    R102	0x660000
    R101	0x650011
    R100	0x640000
    R99	0x630000
    R98	0x620000
    R97	0x610888
    R96	0x600000
    R95	0x5F0000
    R94	0x5E0000
    R93	0x5D0000
    R92	0x5C0000
    R91	0x5B0000
    R90	0x5A0000
    R89	0x590000
    R88	0x580000
    R87	0x570000
    R86	0x560000
    R85	0x550000
    R84	0x540000
    R83	0x530000
    R82	0x520000
    R81	0x510000
    R80	0x500000
    R79	0x4F0000
    R78	0x4E0003
    R77	0x4D0000
    R76	0x4C000C
    R75	0x4B0880
    R74	0x4A0000
    R73	0x49003F
    R72	0x480001
    R71	0x470081
    R70	0x46C350
    R69	0x450000
    R68	0x4403E8
    R67	0x430000
    R66	0x4201F4
    R65	0x410000
    R64	0x401388
    R63	0x3F0000
    R62	0x3E0322
    R61	0x3D00A8
    R60	0x3C0000
    R59	0x3B0001
    R58	0x3A9001
    R57	0x390020
    R56	0x380000
    R55	0x370000
    R54	0x360000
    R53	0x350000
    R52	0x340820
    R51	0x330080
    R50	0x320000
    R49	0x314180
    R48	0x300300
    R47	0x2F0300
    R46	0x2E07FC
    R45	0x2DC0DF
    R44	0x2C1FA3
    R43	0x2B0000
    R42	0x2A0000
    R41	0x290000
    R40	0x280000
    R39	0x2703E8
    R38	0x260000
    R37	0x250304
    R36	0x240054
    R35	0x230004
    R34	0x220000
    R33	0x211E21
    R32	0x200393
    R31	0x1F43EC
    R30	0x1E318C
    R29	0x1D318C
    R28	0x1C0488
    R27	0x1B0002
    R26	0x1A0DB0
    R25	0x190C2B
    R24	0x18071A
    R23	0x17007C
    R22	0x160001
    R21	0x150401
    R20	0x14E048
    R19	0x1327B7
    R18	0x120064
    R17	0x11012C
    R16	0x100080
    R15	0x0F064F
    R14	0x0E1E10
    R13	0x0D4000
    R12	0x0C5001
    R11	0x0B0018
    R10	0x0A10D8
    R9	0x090604
    R8	0x082000
    R7	0x0740B2
    R6	0x06C802
    R5	0x0500C8
    R4	0x040A43
    R3	0x030642
    R2	0x020500
    R1	0x010808
    R0	0x00251C

  • Hello Sushant,

    For diagnostic purposes, if you set the PLL in integer mode and reload the registers, does this remove the 50kHz spur? If so, the spur is related to the MASH order or the fractional divider.

    Also, have you double-checked that the spur is not coming from your reference? You did mention changing the power supply without improvement, but I don't see anywhere that you checked the reference.


    Derek Payne

  • As per suggestion, I have tried changing the 100MHz REF but the same issue. 100MHz reference is taken from OCXO and there is no spurious from OCXO.

    Changed PLL in to integer mode but spurious is increased attached image of the spectrum and TICS Pro configuration.

  • Hi Sushant,

    I don't know what was happening, let's guess.

    Can you change the DC-blocking capacitors at the OSCin pins from 1µF to 0.1µF?

    Can you also try enable OSCin doubler and then make Pre-R divider = div/2?

  • Hi,

    50KHz offset spurious looks like generating from the spectrum analyzer. So ignore these spurious.

    I am using this PLL to work from 1300 to 2400MHz frequency band with 1MHz step size I have done the PLL setting as following TICS Pro screenshot, Other than multiplier registers all other registers are kept constant. As per the required output frequency, we are changing multiplier register values. For integer frequencies like 1400MHz there is no spurious observed but for fractional-order frequencies like 1402MHz spurious with 2MHz offset 49dBc is observed.

    Spurious issues for fractional multiplier values as follow, 

    Please suggest how to improve this spurious to 70 to 80dBc.

  • Hi Sushant,

    Please try:

    - make CAL_CLK_DIV = Div2.

    - use a smaller charge pump current

    - use third order loop filter

    - reduce reference clock signal swing

    - set PLL_DEN to something like 2345678 instead of integer multiple of 100