TPL5111: Clock & timing forum

Sunglin Chen

Part Number: TPL5111

Dear All,

The default output of MCU is pull-high when the RESET has been triggered, therefore the EN_TC is high when LDO is enabled. I would like to know how to solve this case when the default state of the GPIO pin of the MCU is high ? Thank you.

Xview.

over 2 years ago

0 Noel Fung over 2 years ago

TI__Guru* 81400 points

Hi Xview,

Can you provide your connection diagram between TPL5111, MCU and LDO?

0 Sunglin Chen over 2 years ago in reply to Noel Fung

Expert 2335 points

Hi Noel,

The schematic of the TPL5111 and LDO is as follows,

The nEN_PW33 pin is connected to a GPIO pin of MCU. The default state of GPIO pin of MCU is high, so DONE pin has been triggered when the OUT pin of TPL5111 is high. Do you have any idea to solve this case?

Thank you.

xview.

0 Noel Fung over 2 years ago in reply to Sunglin Chen

TI__Guru* 81400 points

Hi Xview,

There is nothing we can do on TPL5111. You should check with the MCU spec, see whether the internal pull-high is a weak pull-high. If this is the case, you can put a 1kΩ (or a few kΩ) pull-down resistor at that GPIO pin to make it LOW all the time.

0 Sunglin Chen over 2 years ago in reply to Noel Fung

Expert 2335 points

Hi Noel,

Good idea! I will add a pull-low resistor to try the function. Thanks.

xview.

0 Sunglin Chen over 2 years ago in reply to Noel Fung

Expert 2335 points

Hi Noel,

I put a 1KΩ pull-down resistor at the GPIO pin and It works!

Thank you very much.

xview.