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LMX2582: 10MHz LVDS Clock reference via backplane

Part Number: LMX2582

Hello, 

I have a design where I want to use the LMX2582 to generate a ~3.6GHz local clock.  The only clock reference for the LMX2582 is from a high-fidelity 10MHz clock available on a backplane, using M-LVDS to distribute this ref clock. 

I plan on using the LMX2582 for each of three plug-in cards on this backplane. 

I have 2 questions:

1. What is the best way to terminate this multi-drop LVDS clock, at each of the LMX2582 inputs?  I'd prefer not use a LVDS receiver chip, if it's not necessary.

2. Is it not recommended to use such a low frequency clock reference for the LMX2582?  If so, what options are recommended for stepping up this high-fi 10MHz reference?

Thanks,

Josh

  • Hi Josh,

    1. What is the best way to terminate this multi-drop LVDS clock, at each of the LMX2582 inputs?  I'd prefer not use a LVDS receiver chip, if it's not necessary.

    Differential LVDS clocks can be directly connected to OSCin pins of the LMX2582 with AC coupling capacitors.

    2. Is it not recommended to use such a low frequency clock reference for the LMX2582?  If so, what options are recommended for stepping up this high-fi 10MHz reference?

    Lower reference frequency affects the phase noise performance of the LMX2582. If phase noise performance are not critical, you can use 10MHz reference with higher slew rate, which can be achieved with LVDS format.

    Regards,

    Ajeet Pal

  • Thanks for your reply. 

    Differential LVDS clocks can be directly connected to OSCin pins of the LMX2582 with AC coupling capacitors.

    The LMX2582 datasheet specs the OSCin pins as high-impedance/internally-biased, so do I still need to terminate the LVDS bus with 100 ohm? See pic for planned implementation...

    Lower reference frequency affects the phase noise performance of the LMX2582. If phase noise performance are not critical, you can use 10MHz reference with higher slew rate, which can be achieved with LVDS format.

    I'm weighing the benefits of LVDS vs M-LVDS for this distributed clock over backplane design. LVDS has a faster slew rate, which might be helpful for achieving better phase noise performance, but this faster slew rate might also negatively impact the clock's signal integrity across the backplane. Can you comment on this?

  • Hi Josh,

    The LMX2582 datasheet specs the OSCin pins as high-impedance/internally-biased, so do I still need to terminate the LVDS bus with 100 ohm? See pic for planned implementation...

    You should keep the 100ohm resistor across the OSCin pins of each LMX2582, same as third LMX.

    I'm weighing the benefits of LVDS vs M-LVDS for this distributed clock over backplane design. LVDS has a faster slew rate, which might be helpful for achieving better phase noise performance, but this faster slew rate might also negatively impact the clock's signal integrity across the backplane. Can you comment on this?

    My previous comment on the low frequency clock reference at LMX2582 is for high slew rate input, which can be achieve with M-LVDS input also. For signal integrity performance, proper termination options can be provide.

    Regards,

    Ajeet Pal

  • I chose to use a single 100 ohm termination, at the far in end of the bus, according to Ti's SLLA108A.  I think using multiple 100 ohm terminations would load down the bus?

  • Yes, that's correct to keep the far end resistor 100ohm termination. My suggestion to have additional terminations options for other devices and can keep them as DNI.

    Regards,

    Ajeet Pal