Other Parts Discussed in Thread: LMK05318B, CDCE6214, LMK5B12204
Hi Team,
Please advise me on a question bellow:
I try to modify output frequency of LMK03318 on the fly.
On the fly means that output clock is kept running without
any disturbance.
Do you think it is feasible?
I suspect that it may feasible by slightly change the N divider resister.
For example, using 100 MHz ref clock, the VCO can run at 4800 MHz.
It can be divided to 100 MHz, while N divider can be set to 1/48 + 0/10000.
When the nominator is changed from 0 to 48, VCO frequency can be shifted
-100 PPM.
I have two concerns.
1. One I2C access is limited to 8 bits, while N divider consists of 22 bits.
If all 22 bits changes can be reflected at an instance
2. The datasheet recommends sequential register access.
If individual register access can be accepted.
3. Any changes related to PLL divider may case re-calibration
Does N divider access cases re-calibration?
4. How much frequency shift can be accepted without VCO re-calibration?
Mita
