Other Parts Discussed in Thread: TIDA-01442, LMX2582, ADC12DJ3200
TI has a high speed data acquisition reference design (Document number (TIDA-01442). In that design, LMK04832 and LMX2582 use a local 100 MHZ oscillator producing "FPGA_JESD_CLK_A", "FPGA_JESD_CLK_B", "FPGA_JESD_SYSREF", and "SYSREF" for ADC12DJ3200. Could you let me know what frequencies these clock signals are in order to acquire analog signal at 3.2 GSPS sampling rate?
Thanks,
Jimmy