LMK04816: The influence of difference VCXO input impendence to PLL perfromance

Hi Lucas,

In general, lower the impedance at the VCXO control pin can cause:

• Increased lock time due to additional drive required from the charge pump
• Asymmetric charge pump loading, resulting in spurs at the phase detector frequency
• Unstable lock (for much lower impedances, e.g. 50kΩ - not usually a problem for 1MΩ or greater)

For 2nd order loop filters: The LMK04816 charge pump current on PLL1 is on the order of 100µA or greater. Across 0-3.3V range, a 1MΩ load represents a change in charge pump current of about 3µA, or no worse than 3% of nominal charge pump gain. Generally it is a good idea to keep charge pump loading to <1% of charge pump current to avoid asymmetric charge pump loading. If they use 400µA or 1600µA charge pump current on PLL1, there will be no noticeable impact from the 1MΩ VCXO; there should be no noticeable impact from the 10MΩ VCXO for any charge pump current setting.

For 3rd or 4th order loop filters: The divider effects of R3 and R4 will also need to be taken into account. Again, it is generally a good idea to ensure <1% difference between charge pump voltage and Vc input pin voltage, in this case to help minimize long settling time and avoid marginal stability. Active filters can also help provide a low-impedance source to drive the Vc pin. It is generally rare that a 3rd or 4th order loop filter is required for a VCXO, and most of the time a 2nd order loop filter is sufficient; if even more filtering is required, I recommend sticking to 3rd order only, and use the higher impedance VCXO to minimize impact of R3 on system voltage.

Regards,

Derek Payne

Lucas,

I apologize for the delay, I thought I had replied to this thread and some computer troubles obfuscated the thread state for a while.

I'm not sure what you're asking for... maybe it's not clear why the lower impedance is a problem?

• 2nd order loop filter has a charge pump directly connected to the Vc pin on the VCXO, so achieving the desired voltage is usually possible even with lower Vc impedance. However, the lower impedance may introduce voltage ripple at the phase detector frequency, which can make the phase detector spur much larger than normal. It also forces the charge pump on time to be longer than the off-time, which increases the close-in noise, and can lead to longer lock time or instability due to cycle-slipping. However, the constant current at the Vc pin required for instability will be higher than the amount at which some minor degradation in PLL noise will be observed.
• 3rd and 4th order loop filter has a resistor divider formed by R3 (and potentially R4) in series with the Vc pin load. This means the voltage at the charge pump has to be higher than the voltage at the Vc pin. Normally the charge pump is designed to operate with the up and down elements at the midpoint voltage; for a 3.3V charge pump this is about 1.65V. But if the load impedance is 50kΩ and the R3 (+R4) impedance is 20kΩ, to achieve 1.65V at the Vc pin we must output 1.65 * (20k + 50k) / 50k = 2.31V at the charge pump, which can push the charge pump out of linear operation and make the loop more sensitive to loss of lock over temperature. The loop response will also change, though the exact change is difficult to calculate.
• Adding a high-impedance amplifier stage between the VCXO Vc pin and the charge pump output can help to mitigate the impedance differences. But if there is an additional filtering stage after the amplifier creating the same voltage divider effect, as in the various active filter designs, the charge pump voltage may need to go up or down to compensate for the amplifier's output offset, negating the benefit of the higher input impedance. And if the amplifier is placed directly after the loop filter as a noninverting buffer stage, this will add the buffer resistor noise to the filter noise at the Vc pin, along with the intrinsic noise of the buffer, any frequency response due to limited gain response, and power supply noise that could not be rejected by the amplifier.

Generally the higher the specified impedance of the Vc pin, the less you have to worry about any of these effects, and the closer to ideal the loop will behave. In practice, many VCXO manufacturers put a number that their test program can capture, while the actual impedance can be many orders of magnitude higher. Between the 1MΩ and 10MΩ VCXOs, if all else is equal, the 10MΩ is a better choice; but in practice, there will be little observable difference even if those numbers are accurate, and chances are they are both lower bounds governed by manufacturability testing requirements than by the actual circuit used.

Regards,

Derek Payne