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LMK04828: the output frequency inaccurate

Part Number: LMK04828

Hi team,

OSCIN input 192MHZ, PLL2 multiplier to 3072MHZ, split output 192MHZ, internal VCO1 used, output frequency inaccurate. What could be the possible cause?

It was later discovered that the fPD2 can only be up to 155MHz, is the output frequency inaccurate because fPD2 is larger than 155MHz?

Best Regards,

Amy Luo

  • Hi Amy,

    I have three possible explanations:

    • Is the SYNC_DISSYSREF bit cleared? The SYSREF signal may be resetting the SYSREF divider, which would cause the PLL to continuously fall out of lock.
    • Is the SYSREF divider enabled? SYSREF divider needs to be enabled for SYSREF feedback.
    • Has the loop filter been modified from default values? (C1 = 47pF, C2 = 3.9nF, R2 = 620Ω) I quickly checked but the loop filter should be stable with this configuration.

    If all of the above conditions are satisfied, it may just be that 192MHz is too high for the phase detector to work reliably. Does it work at 96 MHz?


    Derek Payne