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LMX2594: Phase synchronization configuration of two devices

Amy Luo
Expert 6895 points
Part Number: LMX2594
Other Parts Discussed in Thread: REG101

Hi team,

One of our customers has the following questions. Can you provide ideas to solve the problems？

The reference signals of device 1 and device 2 come from the same clock. Sync is connected together. The same program is written to devices 1 and 2 through program control. Sync is controlled externally through pulse signal, and the output is not locked. When pulse is added, the frequency output is not coherent. Set bit 15 in register 58 to 0. When the external sync generates a pulse, the current will increase, but it is still not locked.

Best Regards, 

Amy Luo

  • 0
    TI__Expert 6895 points

    Hi,

    Any updates on this?

    Thanks,

    Amy 

  • 0 in reply to Amy Luo
    TI__Genius 12560 points

    Hi Amy,

    Sorry for delayed response.

    Can you get the programmed config files and LMX2594 only schematic to see the sequence and connections?

    By seeing the attached image, it seems LMX is operating in fractional mode and in category 3 for sync. Hence, it's sync input is critical for synchronization.

    It's weird to see the device is getting unlock after getting the sync. Is that correct? Before, sync input is this locking?

    Regards,
    Ajeet Pal

  • 0 in reply to Ajeet Pal
    TI__Expert 6895 points

    Hi Ajeet,

    configuration：

    void SendReg1(void)
    {

    SendOneReg1(0x70,0x00,0x00); //0111 0000 1111 1111 1111 1111 //Reg112
    SendOneReg1(0x6F,0x00,0x00);
    SendOneReg1(0x6E,0x00,0x00);
    SendOneReg1(0x6D,0x00,0x00);
    SendOneReg1(0x6C,0x00,0x00);
    SendOneReg1(0x6B,0x00,0x00);
    SendOneReg1(0x6A,0x00,0x01); //0110 1010 0000 0000 0000 0001 //Reg106 RAMP_SCALE_COUNT=1
    SendOneReg1(0x69,0x00,0x21); //0110 1001 0000 0000 0010 0001 //Reg105 RAMP_DLY_CNT=1 RAMP1_NEXT_TRIG=1
    SendOneReg1(0x68,0x00,0x00);
    SendOneReg1(0x67,0x00,0x00);
    SendOneReg1(0x66,0x00,0x00);
    SendOneReg1(0x65,0x00,0x11); //0110 0101 0000 0000 0001 0001 //Reg101 RAMP1_RST=1 RAMP0_NEXT_TRIG=1
    SendOneReg1(0x64,0x00,0x00);
    SendOneReg1(0x63,0x00,0x00);
    SendOneReg1(0x62,0x00,0x00);
    SendOneReg1(0x61,0x08,0x88); //0110 0001 0000 1000 1000 1000 //Reg97 RAMP0_RST[15]=0 RAMP_TRIGB[10:7]=0001 RAMP_TRIGA[6:3]=0001 RAMP_BURST_TRIG[1:0]=00
    SendOneReg1(0x60,0x00,0x00);
    SendOneReg1(0x5F,0x00,0x00);
    SendOneReg1(0x5E,0x00,0x00);
    SendOneReg1(0x5D,0x00,0x00);
    SendOneReg1(0x5C,0x00,0x00);
    SendOneReg1(0x5B,0x00,0x00);
    SendOneReg1(0x5A,0x00,0x00);
    SendOneReg1(0x59,0x00,0x00);
    SendOneReg1(0x58,0x00,0x00);
    SendOneReg1(0x57,0x00,0x00);
    SendOneReg1(0x56,0x00,0x00);
    SendOneReg1(0x55,0x00,0x00);
    SendOneReg1(0x54,0x00,0x00);
    SendOneReg1(0x53,0x00,0x00);
    SendOneReg1(0x52,0x00,0x00);
    SendOneReg1(0x51,0x00,0x00);
    SendOneReg1(0x50,0x00,0x00);
    SendOneReg1(0x4F,0x00,0x00);
    SendOneReg1(0x4E,0x00,0x03); //0100 1110 0000 0000 1011 1101 //Reg78 RAMP_THRESH[11]=0 QUICK_RECAL_EN[9]=0 VCO_CAPCTRL_STRT[8:1] =01011110
    SendOneReg1(0x4D,0x00,0x00);
    SendOneReg1(0x4C,0x00,0x0C);
    SendOneReg1(0x4B,0x09,0x00); //0100 1011 0000 1001 1000 0000 //Reg75 CHDIV[10:6]= 00110=6(24)
    SendOneReg1(0x4A,0x00,0x00);
    SendOneReg1(0x49,0x00,0x3F);
    SendOneReg1(0x48,0x00,0x01);
    SendOneReg1(0x47,0x00,0x81);
    SendOneReg1(0x46,0xC3,0x50);
    SendOneReg1(0x45,0x00,0x00);
    SendOneReg1(0x44,0x03,0xE8);
    SendOneReg1(0x43,0x00,0x00);
    SendOneReg1(0x42,0x01,0xF4);
    SendOneReg1(0x41,0x00,0x00);
    SendOneReg1(0x40,0x13,0x88);
    SendOneReg1(0x3F,0x00,0x00);
    SendOneReg1(0x3E,0x03,0x22);
    SendOneReg1(0x3D,0x00,0xA8);
    SendOneReg1(0x3C,0x00,0x00);
    SendOneReg1(0x3B,0x00,0x01);
    SendOneReg1(0x3A,0x10,0x01);
    SendOneReg1(0x39,0x00,0x20);
    SendOneReg1(0x38,0x00,0x00);
    SendOneReg1(0x37,0x00,0x00);
    SendOneReg1(0x36,0x00,0x00);
    SendOneReg1(0x35,0x00,0x00);
    SendOneReg1(0x34,0x08,0x20);
    SendOneReg1(0x33,0x00,0x80);
    SendOneReg1(0x32,0x00,0x00);
    SendOneReg1(0x31,0x41,0x80);
    SendOneReg1(0x30,0x03,0x00);
    SendOneReg1(0x2F,0x03,0x00);
    SendOneReg1(0x2E,0x07,0xFC); //0010 1110 0000 0111 1111 1100 //Reg46 OUTB_MUX[1:0]=00
    SendOneReg1(0x2D,0xC0,0xC0); //0010 1101 1100 0000 1100 0000 //Reg45 OUTA_MUX[12:11]=00 OUT_ISET[10:9]=00 VCOOUTB_PWR=000000
    SendOneReg1(0x2C,0x1F,0xA2); //0010 1100 0001 1111 1010 0010 //Reg44 VCOOUTA_PWR[13:8]=011111 OUTB_PD[7]=1 OUTA_PD[6]=0 MASH_RESET_N[5]=1 MASH_ORDER[2:0] = 010=2
    SendOneReg1(0x2B,0x5F,0xD3); //0010 1011 0000 0000 0000 0000 //Reg43 PLL_NUM[15:0] =0
    SendOneReg1(0x2A,0x00,0x37); //0010 1010 0000 0000 0000 0000 //Reg42 PLL_NUM[31:16] =0
    SendOneReg1(0x29,0x00,0x00);
    SendOneReg1(0x28,0x00,0x00);
    SendOneReg1(0x27,0x61,0x99);
    SendOneReg1(0x26,0x03,0x3D);
    SendOneReg1(0x25,0x82,0x04); //0010 0101 1000 0010 0000 0100 //Reg37 MASH_SEED_EN[15]=1 PFD_DLY_SEL[13:8] = 2
    SendOneReg1(0x24,0x00,0x20); //0010 0100 0000 0000 0010 0000 //Reg36 PLL_N[15:0] =32
    SendOneReg1(0x23,0x00,0x04);
    SendOneReg1(0x22,0x00,0x00); //0010 0010 0000 0000 0000 0000 //Reg34 PLL_N[18:16] =0
    SendOneReg1(0x21,0x1E,0x21);
    SendOneReg1(0x20,0x03,0x93);
    SendOneReg1(0x1F,0x43,0xEC); //0010 0010 0100 0011 1110 1100 //Reg31 CHDIV_DIV2 =0
    SendOneReg1(0x1E,0x31,0x8C);
    SendOneReg1(0x1D,0x31,0x8C);
    SendOneReg1(0x1C,0x04,0x88);
    SendOneReg1(0x1B,0x00,0x02);
    SendOneReg1(0x1A,0x0D,0xB0);
    SendOneReg1(0x19,0x0C,0x2B);
    SendOneReg1(0x18,0x07,0x1A);
    SendOneReg1(0x17,0x00,0x7C);
    SendOneReg1(0x16,0x00,0x01);
    SendOneReg1(0x15,0x04,0x01);
    SendOneReg1(0x14,0xE0,0x48); //0001 0100 1101 0000 0100 1000 //Reg20 VCO_SEL= 010>>VCO2
    SendOneReg1(0x13,0x27,0xB7);
    SendOneReg1(0x12,0x00,0x64);
    SendOneReg1(0x11,0x01,0x2C); //0001 0001 0000 0001 0010 1100 //Reg17 VCO_DACISET_STRT[8:0] =100010000
    SendOneReg1(0x10,0x00,0x80);
    SendOneReg1(0x0F,0x06,0x4F);
    SendOneReg1(0x0E,0x1E,0x70);
    SendOneReg1(0x0D,0x40,0x00);
    SendOneReg1(0x0C,0x50,0x01); //0000 1100 1001 0000 0000 0001 //Reg12 PLL_R_PRE[0]= 1
    SendOneReg1(0x0B,0x00,0x28); //0000 1011 0000 0000 0010 1000 //Reg11 PLL_R[4]=2
    SendOneReg1(0x0A,0x10,0xD8); //0000 1010 0001 0000 1101 1000 //Reg10 MULT =00001
    SendOneReg1(0x09,0x06,0x04);
    SendOneReg1(0x08,0x68,0x00); //0000 1000 0110 1000 0000 0000 //Reg8 VCO_DACISET_FORCE[14]=1 VCO_CAPCTRL_FORCE[11]=1
    SendOneReg1(0x07,0x40,0xB2);
    SendOneReg1(0x06,0xC8,0x02);
    SendOneReg1(0x05,0x00,0xC8);
    SendOneReg1(0x04,0x0A,0x43); //0000 0100 0000 1010 0100 0011 //Reg4 ACAL_CMP_DLY[15:8] =00001010
    SendOneReg1(0x03,0x06,0x42);
    SendOneReg1(0x02,0x05,0x00);
    SendOneReg1(0x01,0x08,0x08);
    SendOneReg1(0x00,0x64,0x1C); //0000 0000 0110 0100 0001 1100 //Reg0 VCO_PHASE_SYNC[D14]=1 FCAL_EN[]= 1 MUXOUT_LD_SEL[2]= 1

    It's not locked before adding sync, and it can't be locked after adding sync, so it can't be synchronized.

  • 0 in reply to Amy Luo
    TI__Genius 12560 points

    Hi Amy,

    It seems, customer is trying to operate LMX2594 in full assist mode and forcing the VCO_CAPCTRL_Force, VCO_DACISET_Force, which affecting the lock performance of the device.

    If they wanted to use in full assist mode, they need to follow the section 7.3.6 in LMX2594 datasheet to use the device. and can follow the below link of app note on the VCO calibration.

    https://www.ti.com/lit/an/snaa336a/snaa336a.pdf

    With their config file, if they use the device in normal operation (without VCO_CAPCTRL_Force, VCO_DACISET_Force, i.e. 0) and keep the MASH_order - 1 and PFD_DLY_SEL - 1, the PLL will lock and see the output. Hence, can be used in the SYNC function.

    Regards,
    Ajeet Pal