LMK04828: OSCout Frequency Range

Hi Derek,

Thanks for the information.

I would also  like to confirm my understanding on LMK04832 clock generator. If I'm not wrong the only difference  between LMK4828 and LMK4832 is that there is LMK4832 odd clock output supports LVCMOS.

Since I want four LVCMOS clock output , LMK04828 doesn't seem feasible to this , I'm planning to shift to LMK4832 which is pin and feature compatible  with LMK4828   and also supports LVCMOS output

Also as you said  by default OSCout comes up in LVPECL format , so without programming if we want to change to LVCMOS we need to use an external device for conversion.

Also LMK4828 datasheet its been mentioned that - "The OSCout buffer output type is programmable to LVDS, LVPECL, or LVCMOS" .

As per the datasheet If I'm programming first then should I use any external device for conversion or is it just setting in TICS pro software?

In addition to this I'm using a VCXO (160MHz) to drive OSCin - With this can I generate OSCout clock frequency 33.333333MHz?

Nireeksha,

There are actually multiple differences between LMK04828 and LMK04832, of which the LVCMOS support on odd clocks (and CLKout8/10) is one such difference. Some of the others include:

• Increased maximum phase detector rate at PLL2 (320MHz) for improved noise performance
• Channel dividers and digital delays increased to maximum 1023
• Device Clocks or SYSREFs can be routed to any CLKout
• PLL1 and PLL2 R dividers can be synchronized
• CML output format added for odd clocks, high-performance bypass mode (divide-by-1 only) included in CML format for even clocks
• VCO frequency ranges shift slightly from LMK04828
• Holdover behaviors in PLL1 slightly modified
• PLL2 3rd and 4th order components are internally fixed rather than adjustable
• CLKinX mux can drive PLL2
• PLL1 N feedback can be selected from PLL2 prescaler output in addition to previous paths on LMK04828
• Device clock analog delay removed; SYSREF analog delay steps reduced to 21ps step size and variation over temperature decreased to ±5ps

The register maps are not compatible between LMK04828 and LMK04832, so designs for LMK04828 will need to be re-implemented on LMK04832 in the new register map style. Otherwise, the two devices are p2p.

Onto your second post:

I'll point out first that LMK04828 is probably not a good fit for generating 4x LVCMOS clocks at 100/3 MHz, since as you note it does not have enough LVCMOS outputs (only OSCout) and would require external division and format conversion (maximum channel divider on LMK04828 is 32, neither VCO can be reduced enough to meet the 100/3 MHz frequency).

It sounds like you do not want to do programming after each POR to achieve the frequency you need, but LMK04832 does not have EEPROM or other nonvolatile memory, and does not default to settings which can easily convert a 160MHz VCXO to 100/3 MHz clocks. TICS Pro can help generate a register configuration, and can communicate with the evaluation module (or a production board with compatible SPI pinout), but it is not intended as a one-time programming solution for the LMK04832 because this device does not have nonvolatile memory.

The way I see it, you have two options:

1. Export your TICS Pro configuration to raw register values, and program the device with these settings immediately after every POR with an on-board microcontroller or FPGA in your application loading the register settings on startup. This would permit the use of LMK04832 with 4x LVCMOS outputs at 100/3 MHz, but the arrangements to program the device after every POR may be outside of the scope of what you want.
2. Select a different device, e.g. LMK03318 or CDCE6214, which has integrated EEPROM and support for 4x LVCMOS (1.8V) outputs at the desired frequency. TI does have a few other clock generators, though most will not have comparable phase noise performance to the LMK04832.

Does this make sense?

Regards,

Derek Payne

Thanks alot for the detailed explanation Derek.

Yes the overall concept seems clear.

On more thing I would ask further is that  I have finalized to use LMK04832 in replacement of LMK04828. My only concern now is with respect to OSCout clock output.

As it mentioned OSCout is buffered output of OSCin. My required output from OSCout is 100/3 MHz (LVCMOS) . So as I said earlier I'm using a VCXO (160MHz)  to drive OSCin .In this case as mentioned in the spec I need not do prior programming "OSCout will oscillate at start-up at the frequency of the VCXO attached to OSCin port". 

Could you comment on this understanding.

Also is providing VCXO (OSCin- 160MHz) is fair enough to get an output of 100/3 MHz (OSCout) ?

Also just like LMK4828 even in LMK4832 , OSCout by default clock output will be LVPECL right? And we need to use any external device (TLV3601) to convert from LVPCEL to LCMOS.

Hi Julian,

"With a 160MHz VCXO the closest you get to 100/3MHz on OSCout is 160/5 MHz"

Thanks for this information. So what should be the input for OSCin to achieve output of 100/3 MHz?

Also You mentioned that we can reprogram the OSCout output to LVCMOS. Instead I can also use a external device ( Eg:TLV3603) for converting the OSCout LVPECL output to LVCMOS, Since I want this output before programming.