LMX2594EVM: LMX2594 Phase Noise

By the way, the loop filter constant of the evaluation board is the same as the simulation.

Regards,
Akihiko Yokouchi/

Hi Yokouchi-san,

I don't know why the phase noise is so bad at 100kHz offset, is the test result taken with the EVM or customer board? Can the customer test it with a clean reference clock? 

The register configuration looks good in general, I have some suggestions:

At 12070MHz, we should set VCO_SEL = 4, VCO_DACISET_STRT = 300, and VCO_CAPCTRL_STRT = 1. This will affect the VCO calibration. I suggest use this configuration for any VCO frequencies.

I think, in general, a 3rd order MASH is good enough.

Hi Yokouchi-san,

looking forward to seeing the test result with the real, clean reference clock.

In the mean time, can the customer do (1) increase the charge pump to 15mA and (2) decrease the charge pump to 3mA? I want to see how the phase noise change in order to get a sense of what was causing the high phase noise.

Hello. Dear Noel,
Thank you for your advice.

I confirmed the phase noise due to the 120M REF used.
As a result, the 100kHz characteristic that existed when 120M REF was used as SG has disappeared (Fig. 1).
In the loop band: The flat part is about 10dB worse than the simulation.
This is probably because the phase noise of the 120M REF during measurement is worse than that of the 120M REF of the simulation (Fig. 2).
It was confirmed that there is no problem with phase noise by using 120M REF, which is planned to be used, instead of SG.
However, I'm worried that I happened to get the characteristics well.
I check the phase noise when changing the CP current.
Is there anything else I can do to find out that the confirmation is okay?

Regards,
Akihiko Yokouchi/

Fig. 1

Fig.2

Hi Yokouchi-san,

If I use Fig2 as the reference clock, I get similar simulation result as Fig1. The flat region is still affected by the reference clock. To get a lower phase noise in the flat region, we need to increase the loop bandwidth and to use a better phase noise reference clock.

Hello. Dear Noel,
Thank you for your advice.

I changed the CP current and confirmed the phase noise.
Fig 1: 3mA, Fig 2: 6mA, Fig 3: 9mA, Fig 4: 12mA, Fig 5: 15mA.
Does this result give you any idea about the characteristics of 100kHz?

Regards,
Akihiko Yokouchi/

Fig 1

Fig 2

Fig 3

Fig 4

Fig 5

Hello. Dear Noel.

I changed the SG of 120M REF from Keysight E4433B to E8257D and confirmed the spectrum.
As a result, spurious was confirmed in the 100kHz offset (Fig. 1).

You can see the difference in spectrum between E4433B and E8257D as shown in Fig. 2.
(Fig. 2 Black: 120M REF of E4433B, Blue: 120M REF of E8257D)

From this result, isn't the 100kHz characteristic using E4433B caused by spurious?
(Spurious was buried in the phase noise)

So can we guess what causes this spurious?
Also, is there anything else I should check?

Regards,
Akihiko Yokouchi/

Fig. 1

Fig. 2

Hi Yokouchi-san,

obviously the bad phase noise was due to the quality of the reference clock, to get datasheet performance of the device, we need a super good reference clock. We use Wenzel as the reference clock in our tests. FYI, below is the phase noise of the Wenzel clock. 

As for the 100KHz spurs, they are not generated by LMX2594, as the fractional spurs frequency should be at least 1.6MHz away from the carrier. Likely that the spurs are due to power supply noise or from the signal generator. the spurs could also be coming from the PC, you can try, after programming the EVM, remove the 10-pin ribbon cable. 

Hello. Dear Noel,
Thank you for your advice.

 Remove the ribbon cable and check the spurious.