CDCM6208: CDCM6208

Shams Syed

Part Number: CDCM6208
Other Parts Discussed in Thread: LMK03318, CDCE6214

Can I configure this part in Pin mode to generate 125 MHz stable clock for the FPGA? - I have a 50 MHz primary system clock source.

or someone has any another clock generator suggestion will be appreciated.

over 2 years ago

0 Timothy T over 2 years ago

TI__Mastermind 28540 points

Hi Shams,

I looked through table 6, 7, and 8. It does not appear 50 MHz source to 125 MHz output is an option for the CDCM6208.

I imagine this clock is required at system start-up. However during your build process
- will you have the option to program an EEPROM? I think we can have several options for you.

Do you have any jitter requirements?

Note, we do also have a tool called clock tree architect that we can use to help find a device for you, you have seen it? www.ti.com/.../CLOCK-TREE-ARCHITECT

73,
Timothy

0 Shams Syed over 2 years ago in reply to Timothy T

Prodigy 40 points

We do not have the EEPROM on our instrument. Also, 150ps (max) skew, 50ps pk-pk jitter performance. Clock is required at system startup with MR.

0 Timothy T over 2 years ago in reply to Shams Syed

TI__Mastermind 28540 points

Some of our devices have the EEPROM on them - you do not need to provide. So you can follow the programming sequence for them during your board production test. Then they will start with the clocks as you require. Some possibilities for you include the CDCE6214 or LMK03318.

Can you tell me what MR is?

73,
Timothy

0 Shams Syed over 2 years ago in reply to Timothy T

Prodigy 40 points

Master Reset - For the board and reference clock

0 Shams Syed over 2 years ago in reply to Timothy T

Prodigy 40 points

Does CDCM6208 has internal EEPROM?

0 Timothy T over 2 years ago in reply to Shams Syed

TI__Mastermind 28540 points

No, it is ROM only.

Clock & timing

Clock & timing forum

CDCM6208: CDCM6208