This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CDCLVC1104: CLKIN voltage level conditions

Part Number: CDCLVC1104


According to the CDCLVC1104 datasheet, when VDD is 3.3V, the input voltage level conditions for the CLCLVC1104 are below.

When VDD is 3.3V, is it correct to input the clock to CLKIN only within the range of VIL and VIH as below?

   - VIL = GND ~ 1.05V

   - VIH = 2.25V ~ 3.8V

If the CDCLVC1104 user inputs a clock signal with a level out of this range to CLKIN, is there a problem?

Thank you.