This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMK04816: Fix Delay Repeatability in 0-delay Mode

Part Number: LMK04816

As I know, the primary goal of 0-delay is to maintain a fix delay between CLKin and CLKout in dual-loop mode or maintain a fix delay between OSCin and CLKout in single-loop mode. That is, the delay is not zero but is a deterministic value. May I know the repeatability spec of this deterministic value assuming for 0-delay with internal feedback.

  • Hi,

    Through the internal feedback for 0-delay mode, CLKout always locked with the CLKin/OSCin input along with phase detector circuit and it will be consistent same as close loop PLL locked for output.

    If the device follow all conditions for 0-delay mode, mentioned in app note, it would always deterministic delay between OSCin and CLKout.

    Thanks!


    Regards,

    Ajeet Pal